+1
−1
Loading
In one of the recent reworks to the XICS code, a bug was introduced where we use the wrong sense and allocate level interrupts instead of message interrupts for PCI MSIs. This patch fixes it. Signed-off-by:Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au> Signed-off-by:
Alexander Graf <agraf@suse.de>