Commit 6f4fa099 authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/stefanha/tags/tracing-pull-request' into staging 



Pull request

 * Python 3 support in simpletrace.py
 * Convert DPRINTF() to trace events

# gpg: Signature made Fri 29 Jun 2018 18:53:05 BST
# gpg:                using RSA key 9CA4ABB381AB73C8
# gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>"
# gpg:                 aka "Stefan Hajnoczi <stefanha@gmail.com>"
# Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35  775A 9CA4 ABB3 81AB 73C8

* remotes/stefanha/tags/tracing-pull-request:
  hw/block/pflash_cfi: Convert from DPRINTF() macro to trace events
  hw/block/fdc: Convert from FLOPPY_DPRINTF() macro to trace events
  hw/net/etraxfs_eth: Convert printf() calls to trace events
  hw/net/ne2000: Convert printf() calls to trace events
  hw/net/ne2000: Add trace events
  hw/input/tsc2005: Convert a fprintf() call to trace events
  hw/char/parallel: Convert from pdebug() macro to trace events
  hw/char/serial: Convert from DPRINTF macro to trace events
  sdcard: Reduce sdcard_set_blocklen() trace digits
  trace: Fix format string for the struct timeval members casted to size_t
  simpletrace: Convert name from mapping record to str

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents 275845ae 13019f1f

hw/block/fdc.c

+3 −3
Original line number Diff line number Diff line
@@ -40,6 +40,7 @@ 
#include "sysemu/blockdev.h"

#include "sysemu/sysemu.h"

#include "qemu/log.h"

#include "trace.h"



/********************************************************/

/* debug Floppy devices */
@@ -927,7 +928,7 @@ static uint32_t fdctrl_read (void *opaque, uint32_t reg) 
        retval = (uint32_t)(-1);

        break;

    }

    FLOPPY_DPRINTF("read reg%d: 0x%02x\n", reg & 7, retval);

    trace_fdc_ioport_read(reg, retval);



    return retval;

}
@@ -936,9 +937,8 @@ static void fdctrl_write (void *opaque, uint32_t reg, uint32_t value) 
{

    FDCtrl *fdctrl = opaque;



    FLOPPY_DPRINTF("write reg%d: 0x%02x\n", reg & 7, value);



    reg &= 7;

    trace_fdc_ioport_write(reg, value);

    switch (reg) {

    case FD_REG_DOR:

        fdctrl_write_dor(fdctrl, value);

hw/block/pflash_cfi01.c

+15 −27
Original line number Diff line number Diff line
@@ -47,6 +47,7 @@ 
#include "qemu/log.h"

#include "hw/sysbus.h"

#include "sysemu/sysemu.h"

#include "trace.h"



#define PFLASH_BUG(fmt, ...) \

do { \
@@ -120,7 +121,7 @@ static void pflash_timer (void *opaque) 
{

    pflash_t *pfl = opaque;



    DPRINTF("%s: command %02x done\n", __func__, pfl->cmd);

    trace_pflash_timer_expired(pfl->cmd);

    /* Reset flash */

    pfl->status ^= 0x80;

    memory_region_rom_device_set_romd(&pfl->mem, true);
@@ -218,15 +219,14 @@ static uint32_t pflash_devid_query(pflash_t *pfl, hwaddr offset) 
    switch (boff & 0xFF) {

    case 0:

        resp = pfl->ident0;

        DPRINTF("%s: Manufacturer Code %04x\n", __func__, resp);

        trace_pflash_manufacturer_id(resp);

        break;

    case 1:

        resp = pfl->ident1;

        DPRINTF("%s: Device ID Code %04x\n", __func__, resp);

        trace_pflash_device_id(resp);

        break;

    default:

        DPRINTF("%s: Read Device Information offset=%x\n", __func__,

                (unsigned)offset);

        trace_pflash_device_info(offset);

        return 0;

        break;

    }
@@ -251,8 +251,7 @@ static uint32_t pflash_data_read(pflash_t *pfl, hwaddr offset, 
    switch (width) {

    case 1:

        ret = p[offset];

        DPRINTF("%s: data offset " TARGET_FMT_plx " %02x\n",

                __func__, offset, ret);

        trace_pflash_data_read8(offset, ret);

        break;

    case 2:

        if (be) {
@@ -262,8 +261,7 @@ static uint32_t pflash_data_read(pflash_t *pfl, hwaddr offset, 
            ret = p[offset];

            ret |= p[offset + 1] << 8;

        }

        DPRINTF("%s: data offset " TARGET_FMT_plx " %04x\n",

                __func__, offset, ret);

        trace_pflash_data_read16(offset, ret);

        break;

    case 4:

        if (be) {
@@ -277,8 +275,7 @@ static uint32_t pflash_data_read(pflash_t *pfl, hwaddr offset, 
            ret |= p[offset + 2] << 16;

            ret |= p[offset + 3] << 24;

        }

        DPRINTF("%s: data offset " TARGET_FMT_plx " %08x\n",

                __func__, offset, ret);

        trace_pflash_data_read32(offset, ret);

        break;

    default:

        DPRINTF("BUG in %s\n", __func__);
@@ -294,11 +291,7 @@ static uint32_t pflash_read (pflash_t *pfl, hwaddr offset, 
    uint32_t ret;



    ret = -1;



#if 0

    DPRINTF("%s: reading offset " TARGET_FMT_plx " under cmd %02x width %d\n",

            __func__, offset, pfl->cmd, width);

#endif

    trace_pflash_read(offset, pfl->cmd, width, pfl->wcycle);

    switch (pfl->cmd) {

    default:

        /* This should never happen : reset state & treat it as a read */
@@ -349,15 +342,14 @@ static uint32_t pflash_read (pflash_t *pfl, hwaddr offset, 
            switch (boff) {

            case 0:

                ret = pfl->ident0 << 8 | pfl->ident1;

                DPRINTF("%s: Manufacturer Code %04x\n", __func__, ret);

                trace_pflash_manufacturer_id(ret);

                break;

            case 1:

                ret = pfl->ident2 << 8 | pfl->ident3;

                DPRINTF("%s: Device ID Code %04x\n", __func__, ret);

                trace_pflash_device_id(ret);

                break;

            default:

                DPRINTF("%s: Read Device Information boff=%x\n", __func__,

                        (unsigned)boff);

                trace_pflash_device_info(boff);

                ret = 0;

                break;

            }
@@ -425,9 +417,7 @@ static inline void pflash_data_write(pflash_t *pfl, hwaddr offset, 
{

    uint8_t *p = pfl->storage;



    DPRINTF("%s: block write offset " TARGET_FMT_plx

            " value %x counter %016" PRIx64 "\n",

            __func__, offset, value, pfl->counter);

    trace_pflash_data_write(offset, value, width, pfl->counter);

    switch (width) {

    case 1:

        p[offset] = value;
@@ -466,9 +456,7 @@ static void pflash_write(pflash_t *pfl, hwaddr offset, 


    cmd = value;



    DPRINTF("%s: writing offset " TARGET_FMT_plx " value %08x width %d wcycle 0x%x\n",

            __func__, offset, value, width, pfl->wcycle);



    trace_pflash_write(offset, value, width, pfl->wcycle);

    if (!pfl->wcycle) {

        /* Set the device in I/O access mode */

        memory_region_rom_device_set_romd(&pfl->mem, false);
@@ -656,8 +644,8 @@ static void pflash_write(pflash_t *pfl, hwaddr offset, 
                  "\n", __func__, offset, pfl->wcycle, pfl->cmd, value);



 reset_flash:

    trace_pflash_reset();

    memory_region_rom_device_set_romd(&pfl->mem, true);



    pfl->wcycle = 0;

    pfl->cmd = 0;

}

hw/block/pflash_cfi02.c

+9 −9
Original line number Diff line number Diff line
@@ -43,6 +43,7 @@ 
#include "sysemu/block-backend.h"

#include "qemu/host-utils.h"

#include "hw/sysbus.h"

#include "trace.h"



//#define PFLASH_DEBUG

#ifdef PFLASH_DEBUG
@@ -124,7 +125,7 @@ static void pflash_timer (void *opaque) 
{

    pflash_t *pfl = opaque;



    DPRINTF("%s: command %02x done\n", __func__, pfl->cmd);

    trace_pflash_timer_expired(pfl->cmd);

    /* Reset flash */

    pfl->status ^= 0x80;

    if (pfl->bypass) {
@@ -143,8 +144,8 @@ static uint32_t pflash_read (pflash_t *pfl, hwaddr offset, 
    uint32_t ret;

    uint8_t *p;



    DPRINTF("%s: offset " TARGET_FMT_plx "\n", __func__, offset);

    ret = -1;

    trace_pflash_read(offset, pfl->cmd, width, pfl->wcycle);

    /* Lazy reset to ROMD mode after a certain amount of read accesses */

    if (!pfl->rom_mode && pfl->wcycle == 0 &&

        ++pfl->read_counter > PFLASH_LAZY_ROMD_THRESHOLD) {
@@ -172,7 +173,7 @@ static uint32_t pflash_read (pflash_t *pfl, hwaddr offset, 
        switch (width) {

        case 1:

            ret = p[offset];

//            DPRINTF("%s: data offset %08x %02x\n", __func__, offset, ret);

            trace_pflash_data_read8(offset, ret);

            break;

        case 2:

            if (be) {
@@ -182,7 +183,7 @@ static uint32_t pflash_read (pflash_t *pfl, hwaddr offset, 
                ret = p[offset];

                ret |= p[offset + 1] << 8;

            }

//            DPRINTF("%s: data offset %08x %04x\n", __func__, offset, ret);

            trace_pflash_data_read16(offset, ret);

            break;

        case 4:

            if (be) {
@@ -196,7 +197,7 @@ static uint32_t pflash_read (pflash_t *pfl, hwaddr offset, 
                ret |= p[offset + 2] << 16;

                ret |= p[offset + 3] << 24;

            }

//            DPRINTF("%s: data offset %08x %08x\n", __func__, offset, ret);

            trace_pflash_data_read32(offset, ret);

            break;

        }

        break;
@@ -274,8 +275,7 @@ static void pflash_write (pflash_t *pfl, hwaddr offset, 
#endif

        goto reset_flash;

    }

    DPRINTF("%s: offset " TARGET_FMT_plx " %08x %d %d\n", __func__,

            offset, value, width, pfl->wcycle);

    trace_pflash_write(offset, value, width, pfl->wcycle);

    offset &= pfl->chip_len - 1;



    DPRINTF("%s: offset " TARGET_FMT_plx " %08x %d\n", __func__,
@@ -345,8 +345,7 @@ static void pflash_write (pflash_t *pfl, hwaddr offset, 
            /* We need another unlock sequence */

            goto check_unlock0;

        case 0xA0:

            DPRINTF("%s: write data offset " TARGET_FMT_plx " %08x %d\n",

                    __func__, offset, value, width);

            trace_pflash_data_write(offset, value, width, 0);

            p = pfl->storage;

            if (!pfl->ro) {

                switch (width) {
@@ -483,6 +482,7 @@ static void pflash_write (pflash_t *pfl, hwaddr offset, 


    /* Reset flash */

 reset_flash:

    trace_pflash_reset();

    pfl->bypass = 0;

    pfl->wcycle = 0;

    pfl->cmd = 0;

hw/block/trace-events

+17 −0
Original line number Diff line number Diff line 
# See docs/devel/tracing.txt for syntax documentation.



# hw/block/fdc.c

fdc_ioport_read(uint8_t reg, uint8_t value) "read reg 0x%02x val 0x%02x"

fdc_ioport_write(uint8_t reg, uint8_t value) "write reg 0x%02x val 0x%02x"



# hw/block/pflash_cfi0?.c

pflash_reset(void) "reset"

pflash_read(uint64_t offset, uint8_t cmd, int width, uint8_t wcycle) "offset:0x%04"PRIx64" cmd:0x%02x width:%d wcycle:%u"

pflash_write(uint64_t offset, uint32_t value, int width, uint8_t wcycle) "offset:0x%04"PRIx64" value:0x%03x width:%d wcycle:%u"

pflash_timer_expired(uint8_t cmd) "command 0x%02x done"

pflash_data_read8(uint64_t offset, uint32_t value) "data offset:0x%04"PRIx64" value:0x%02x"

pflash_data_read16(uint64_t offset, uint32_t value) "data offset:0x%04"PRIx64" value:0x%04x"

pflash_data_read32(uint64_t offset, uint32_t value) "data offset:0x%04"PRIx64" value:0x%08x"

pflash_data_write(uint64_t offset, uint32_t value, int width, uint64_t counter) "data offset:0x%04"PRIx64" value:0x%08x width:%d counter:0x%016"PRIx64

pflash_manufacturer_id(uint16_t id) "Read Manufacturer ID: 0x%04x"

pflash_device_id(uint16_t id) "Read Device ID: 0x%04x"

pflash_device_info(uint64_t offset) "Read Device Information offset:0x%04"PRIx64



# hw/block/virtio-blk.c

virtio_blk_req_complete(void *vdev, void *req, int status) "vdev %p req %p status %d"

virtio_blk_rw_complete(void *vdev, void *req, int ret) "vdev %p req %p ret %d"

hw/char/parallel.c

+13 −3
Original line number Diff line number Diff line
@@ -30,6 +30,7 @@ 
#include "hw/isa/isa.h"

#include "hw/char/parallel.h"

#include "sysemu/sysemu.h"

#include "trace.h"



//#define DEBUG_PARALLEL
@@ -110,9 +111,8 @@ parallel_ioport_write_sw(void *opaque, uint32_t addr, uint32_t val) 
{

    ParallelState *s = opaque;



    pdebug("write addr=0x%02x val=0x%02x\n", addr, val);



    addr &= 7;

    trace_parallel_ioport_write("SW", addr, val);

    switch(addr) {

    case PARA_REG_DATA:

        s->dataw = val;
@@ -157,6 +157,7 @@ static void parallel_ioport_write_hw(void *opaque, uint32_t addr, uint32_t val) 
    s->last_read_offset = ~0U;



    addr &= 7;

    trace_parallel_ioport_write("HW", addr, val);

    switch(addr) {

    case PARA_REG_DATA:

        if (s->dataw == val)
@@ -230,6 +231,8 @@ parallel_ioport_eppdata_write_hw2(void *opaque, uint32_t addr, uint32_t val) 
    struct ParallelIOArg ioarg = {

        .buffer = &eppdata, .count = sizeof(eppdata)

    };



    trace_parallel_ioport_write("EPP", addr, val);

    if ((s->control & (PARA_CTR_DIR|PARA_CTR_SIGNAL)) != PARA_CTR_INIT) {

        /* Controls not correct for EPP data cycle, so do nothing */

        pdebug("we%04x s\n", val);
@@ -253,6 +256,8 @@ parallel_ioport_eppdata_write_hw4(void *opaque, uint32_t addr, uint32_t val) 
    struct ParallelIOArg ioarg = {

        .buffer = &eppdata, .count = sizeof(eppdata)

    };



    trace_parallel_ioport_write("EPP", addr, val);

    if ((s->control & (PARA_CTR_DIR|PARA_CTR_SIGNAL)) != PARA_CTR_INIT) {

        /* Controls not correct for EPP data cycle, so do nothing */

        pdebug("we%08x s\n", val);
@@ -299,7 +304,7 @@ static uint32_t parallel_ioport_read_sw(void *opaque, uint32_t addr) 
        ret = s->control;

        break;

    }

    pdebug("read addr=0x%02x val=0x%02x\n", addr, ret);

    trace_parallel_ioport_read("SW", addr, ret);

    return ret;

}
@@ -371,6 +376,7 @@ static uint32_t parallel_ioport_read_hw(void *opaque, uint32_t addr) 
        }

        break;

    }

    trace_parallel_ioport_read("HW", addr, ret);

    s->last_read_offset = addr;

    return ret;

}
@@ -399,6 +405,7 @@ parallel_ioport_eppdata_read_hw2(void *opaque, uint32_t addr) 
    }

    else

        pdebug("re%04x\n", ret);

    trace_parallel_ioport_read("EPP", addr, ret);

    return ret;

}
@@ -426,11 +433,13 @@ parallel_ioport_eppdata_read_hw4(void *opaque, uint32_t addr) 
    }

    else

        pdebug("re%08x\n", ret);

    trace_parallel_ioport_read("EPP", addr, ret);

    return ret;

}



static void parallel_ioport_ecp_write(void *opaque, uint32_t addr, uint32_t val)

{

    trace_parallel_ioport_write("ECP", addr & 7, val);

    pdebug("wecp%d=%02x\n", addr & 7, val);

}
@@ -438,6 +447,7 @@ static uint32_t parallel_ioport_ecp_read(void *opaque, uint32_t addr) 
{

    uint8_t ret = 0xff;



    trace_parallel_ioport_read("ECP", addr & 7, ret);

    pdebug("recp%d:%02x\n", addr & 7, ret);

    return ret;

}