Commit 6dbdf4ec authored by Peter Maydell's avatar Peter Maydell
Browse files

hw/arm/mps2: Add SCC



Add the SCC to the MPS2 board models.

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Reviewed-by: default avatarPhilippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 1500029487-14822-8-git-send-email-peter.maydell@linaro.org
parent dd73185b
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+16 −1
Original line number Diff line number Diff line
@@ -34,6 +34,7 @@
#include "hw/misc/unimp.h"
#include "hw/char/cmsdk-apb-uart.h"
#include "hw/timer/cmsdk-apb-timer.h"
#include "hw/misc/mps2-scc.h"

typedef enum MPS2FPGAType {
    FPGA_AN385,
@@ -44,6 +45,7 @@ typedef struct {
    MachineClass parent;
    MPS2FPGAType fpga_type;
    const char *cpu_model;
    uint32_t scc_id;
} MPS2MachineClass;

typedef struct {
@@ -60,6 +62,7 @@ typedef struct {
    MemoryRegion blockram_m2;
    MemoryRegion blockram_m3;
    MemoryRegion sram;
    MPS2SCC scc;
} MPS2MachineState;

#define TYPE_MPS2_MACHINE "mps2"
@@ -102,7 +105,7 @@ static void mps2_common_init(MachineState *machine)
    MPS2MachineState *mms = MPS2_MACHINE(machine);
    MPS2MachineClass *mmc = MPS2_MACHINE_GET_CLASS(machine);
    MemoryRegion *system_memory = get_system_memory();
    DeviceState *armv7m;
    DeviceState *armv7m, *sccdev;

    if (!machine->cpu_model) {
        machine->cpu_model = mmc->cpu_model;
@@ -297,6 +300,16 @@ static void mps2_common_init(MachineState *machine)
    cmsdk_apb_timer_create(0x40000000, qdev_get_gpio_in(armv7m, 8), SYSCLK_FRQ);
    cmsdk_apb_timer_create(0x40001000, qdev_get_gpio_in(armv7m, 9), SYSCLK_FRQ);

    object_initialize(&mms->scc, sizeof(mms->scc), TYPE_MPS2_SCC);
    sccdev = DEVICE(&mms->scc);
    qdev_set_parent_bus(armv7m, sysbus_get_default());
    qdev_prop_set_uint32(sccdev, "scc-cfg4", 0x2);
    qdev_prop_set_uint32(sccdev, "scc-aid", 0x02000008);
    qdev_prop_set_uint32(sccdev, "scc-id", mmc->scc_id);
    object_property_set_bool(OBJECT(&mms->scc), true, "realized",
                             &error_fatal);
    sysbus_mmio_map(SYS_BUS_DEVICE(sccdev), 0, 0x4002f000);

    system_clock_scale = NANOSECONDS_PER_SECOND / SYSCLK_FRQ;

    armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename,
@@ -319,6 +332,7 @@ static void mps2_an385_class_init(ObjectClass *oc, void *data)
    mc->desc = "ARM MPS2 with AN385 FPGA image for Cortex-M3";
    mmc->fpga_type = FPGA_AN385;
    mmc->cpu_model = "cortex-m3";
    mmc->scc_id = 0x41040000 | (385 << 4);
}

static void mps2_an511_class_init(ObjectClass *oc, void *data)
@@ -329,6 +343,7 @@ static void mps2_an511_class_init(ObjectClass *oc, void *data)
    mc->desc = "ARM MPS2 with AN511 DesignStart FPGA image for Cortex-M3";
    mmc->fpga_type = FPGA_AN511;
    mmc->cpu_model = "cortex-m3";
    mmc->scc_id = 0x4104000 | (511 << 4);
}

static const TypeInfo mps2_info = {