Commit 6d1d4276 authored by Peter Maydell's avatar Peter Maydell
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Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20180709' into staging



target-arm queue:
 * hw/net/dp8393x: don't make prom region 'nomigrate'
 * boards.h: Remove doc comment reference to nonexistent function
 * hw/sd/omap_mmc: Split 'pseudo-reset' from 'power-on-reset'
 * target/arm: Fix do_predset for large VL
 * tcg: Restrict check_size_impl to multiples of the line size
 * target/arm: Suppress Coverity warning for PRF
 * hw/timer/cmsdk-apb-timer: fix minor corner-case bugs and
   suppress spurious warnings when running Linux's timer driver
 * hw/arm/smmu-common: Fix devfn computation in smmu_iommu_mr

# gpg: Signature made Mon 09 Jul 2018 14:53:38 BST
# gpg:                using RSA key 3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>"
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20180709:
  hw/net/dp8393x: don't make prom region 'nomigrate'
  boards.h: Remove doc comment reference to nonexistent function
  hw/sd/omap_mmc: Split 'pseudo-reset' from 'power-on-reset'
  target/arm: Fix do_predset for large VL
  tcg: Restrict check_size_impl to multiples of the line size
  target/arm: Suppress Coverity warning for PRF
  hw/timer/cmsdk-apb-timer: run or stop timer on writes to RELOAD and VALUE
  hw/timer/cmsdk-apb-timer: Correctly identify and set one-shot mode
  hw/timer/cmsdk-apb-timer: Correct ptimer policy settings
  ptimer: Add TRIGGER_ONLY_ON_DECREMENT policy option
  hw/arm/smmu-common: Fix devfn computation in smmu_iommu_mr

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents a98ff0ec 8fad0a65
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+1 −1
Original line number Diff line number Diff line
@@ -351,7 +351,7 @@ IOMMUMemoryRegion *smmu_iommu_mr(SMMUState *s, uint32_t sid)
    bus_n = PCI_BUS_NUM(sid);
    smmu_bus = smmu_find_smmu_pcibus(s, bus_n);
    if (smmu_bus) {
        devfn = sid & 0x7;
        devfn = SMMU_PCI_DEVFN(sid);
        smmu = smmu_bus->pbdev[devfn];
        if (smmu) {
            return &smmu->iommu;
+21 −1
Original line number Diff line number Diff line
@@ -45,8 +45,20 @@ static void ptimer_reload(ptimer_state *s, int delta_adjust)
    uint32_t period_frac = s->period_frac;
    uint64_t period = s->period;
    uint64_t delta = s->delta;
    bool suppress_trigger = false;

    if (delta == 0 && !(s->policy_mask & PTIMER_POLICY_NO_IMMEDIATE_TRIGGER)) {
    /*
     * Note that if delta_adjust is 0 then we must be here because of
     * a count register write or timer start, not because of timer expiry.
     * In that case the policy might require us to suppress the timer trigger
     * that we would otherwise generate for a zero delta.
     */
    if (delta_adjust == 0 &&
        (s->policy_mask & PTIMER_POLICY_TRIGGER_ONLY_ON_DECREMENT)) {
        suppress_trigger = true;
    }
    if (delta == 0 && !(s->policy_mask & PTIMER_POLICY_NO_IMMEDIATE_TRIGGER)
        && !suppress_trigger) {
        ptimer_trigger(s);
    }

@@ -353,6 +365,14 @@ ptimer_state *ptimer_init(QEMUBH *bh, uint8_t policy_mask)
    s->bh = bh;
    s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, ptimer_tick, s);
    s->policy_mask = policy_mask;

    /*
     * These two policies are incompatible -- trigger-on-decrement implies
     * a timer trigger when the count becomes 0, but no-immediate-trigger
     * implies a trigger when the count stops being 0.
     */
    assert(!((policy_mask & PTIMER_POLICY_TRIGGER_ONLY_ON_DECREMENT) &&
             (policy_mask & PTIMER_POLICY_NO_IMMEDIATE_TRIGGER)));
    return s;
}

+1 −1
Original line number Diff line number Diff line
@@ -887,7 +887,7 @@ static void dp8393x_realize(DeviceState *dev, Error **errp)
    s->watchdog = timer_new_ns(QEMU_CLOCK_VIRTUAL, dp8393x_watchdog, s);
    s->regs[SONIC_SR] = 0x0004; /* only revision recognized by Linux */

    memory_region_init_ram_nomigrate(&s->prom, OBJECT(dev),
    memory_region_init_ram(&s->prom, OBJECT(dev),
                           "dp8393x-prom", SONIC_PROM_SIZE, &local_err);
    if (local_err) {
        error_propagate(errp, local_err);
+11 −3
Original line number Diff line number Diff line
/*
 * OMAP on-chip MMC/SD host emulation.
 *
 * Datasheet: TI Multimedia Card (MMC/SD/SDIO) Interface (SPRU765A)
 *
 * Copyright (C) 2006-2007 Andrzej Zaborowski  <balrog@zabor.org>
 *
 * This program is free software; you can redistribute it and/or
@@ -278,6 +280,12 @@ static void omap_mmc_update(void *opaque)
    omap_mmc_interrupts_update(s);
}

static void omap_mmc_pseudo_reset(struct omap_mmc_s *host)
{
    host->status = 0;
    host->fifo_len = 0;
}

void omap_mmc_reset(struct omap_mmc_s *host)
{
    host->last_cmd = 0;
@@ -286,11 +294,9 @@ void omap_mmc_reset(struct omap_mmc_s *host)
    host->dw = 0;
    host->mode = 0;
    host->enable = 0;
    host->status = 0;
    host->mask = 0;
    host->cto = 0;
    host->dto = 0;
    host->fifo_len = 0;
    host->blen = 0;
    host->blen_counter = 0;
    host->nblk = 0;
@@ -305,6 +311,8 @@ void omap_mmc_reset(struct omap_mmc_s *host)
    qemu_set_irq(host->coverswitch, host->cdet_state);
    host->clkdiv = 0;

    omap_mmc_pseudo_reset(host);

    /* Since we're still using the legacy SD API the card is not plugged
     * into any bus, and we must reset it manually. When omap_mmc is
     * QOMified this must move into the QOM reset function.
@@ -459,7 +467,7 @@ static void omap_mmc_write(void *opaque, hwaddr offset,
        if (s->dw != 0 && s->lines < 4)
            printf("4-bit SD bus enabled\n");
        if (!s->enable)
            omap_mmc_reset(s);
            omap_mmc_pseudo_reset(s);
        break;

    case 0x10:	/* MMC_STAT */
+18 −2
Original line number Diff line number Diff line
@@ -119,17 +119,33 @@ static void cmsdk_apb_timer_write(void *opaque, hwaddr offset, uint64_t value,
        }
        s->ctrl = value & 0xf;
        if (s->ctrl & R_CTRL_EN_MASK) {
            ptimer_run(s->timer, 0);
            ptimer_run(s->timer, ptimer_get_limit(s->timer) == 0);
        } else {
            ptimer_stop(s->timer);
        }
        break;
    case A_RELOAD:
        /* Writing to reload also sets the current timer value */
        if (!value) {
            ptimer_stop(s->timer);
        }
        ptimer_set_limit(s->timer, value, 1);
        if (value && (s->ctrl & R_CTRL_EN_MASK)) {
            /*
             * Make sure timer is running (it might have stopped if this
             * was an expired one-shot timer)
             */
            ptimer_run(s->timer, 0);
        }
        break;
    case A_VALUE:
        if (!value && !ptimer_get_limit(s->timer)) {
            ptimer_stop(s->timer);
        }
        ptimer_set_count(s->timer, value);
        if (value && (s->ctrl & R_CTRL_EN_MASK)) {
            ptimer_run(s->timer, ptimer_get_limit(s->timer) == 0);
        }
        break;
    case A_INTSTATUS:
        /* Just one bit, which is W1C. */
@@ -201,7 +217,7 @@ static void cmsdk_apb_timer_realize(DeviceState *dev, Error **errp)
    bh = qemu_bh_new(cmsdk_apb_timer_tick, s);
    s->timer = ptimer_init(bh,
                           PTIMER_POLICY_WRAP_AFTER_ONE_PERIOD |
                           PTIMER_POLICY_NO_IMMEDIATE_TRIGGER |
                           PTIMER_POLICY_TRIGGER_ONLY_ON_DECREMENT |
                           PTIMER_POLICY_NO_IMMEDIATE_RELOAD |
                           PTIMER_POLICY_NO_COUNTER_ROUND_DOWN);

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