Commit 6cad09d2 authored by Pavel Dovgalyuk's avatar Pavel Dovgalyuk Committed by Richard Henderson
Browse files

target-i386: exception handling for FPU instructions



This patch fixes exception handling for FPU instructions
and removes obsolete PC update from translate.c.

Reviewed-by: default avatarAurelien Jarno <aurelien@aurel32.net>
Reviewed-by: default avatarRichard Henderson <rth@twiddle.net>

Signed-off-by: default avatarPavel Dovgalyuk <pavel.dovgaluk@ispras.ru>
Signed-off-by: default avatarRichard Henderson <rth@twiddle.net>
parent 91980095
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+95 −69
Original line number Diff line number Diff line
@@ -67,22 +67,24 @@ static inline void fpop(CPUX86State *env)
    env->fpstt = (env->fpstt + 1) & 7;
}

static inline floatx80 helper_fldt(CPUX86State *env, target_ulong ptr)
static inline floatx80 helper_fldt(CPUX86State *env, target_ulong ptr,
                                   uintptr_t retaddr)
{
    CPU_LDoubleU temp;

    temp.l.lower = cpu_ldq_data(env, ptr);
    temp.l.upper = cpu_lduw_data(env, ptr + 8);
    temp.l.lower = cpu_ldq_data_ra(env, ptr, retaddr);
    temp.l.upper = cpu_lduw_data_ra(env, ptr + 8, retaddr);
    return temp.d;
}

static inline void helper_fstt(CPUX86State *env, floatx80 f, target_ulong ptr)
static inline void helper_fstt(CPUX86State *env, floatx80 f, target_ulong ptr,
                               uintptr_t retaddr)
{
    CPU_LDoubleU temp;

    temp.d = f;
    cpu_stq_data(env, ptr, temp.l.lower);
    cpu_stw_data(env, ptr + 8, temp.l.upper);
    cpu_stq_data_ra(env, ptr, temp.l.lower, retaddr);
    cpu_stw_data_ra(env, ptr + 8, temp.l.upper, retaddr);
}

/* x87 FPU helpers */
@@ -125,10 +127,10 @@ static inline floatx80 helper_fdiv(CPUX86State *env, floatx80 a, floatx80 b)
    return floatx80_div(a, b, &env->fp_status);
}

static void fpu_raise_exception(CPUX86State *env)
static void fpu_raise_exception(CPUX86State *env, uintptr_t retaddr)
{
    if (env->cr[0] & CR0_NE_MASK) {
        raise_exception(env, EXCP10_COPR);
        raise_exception_ra(env, EXCP10_COPR, retaddr);
    }
#if !defined(CONFIG_USER_ONLY)
    else {
@@ -313,14 +315,14 @@ void helper_fldt_ST0(CPUX86State *env, target_ulong ptr)
    int new_fpstt;

    new_fpstt = (env->fpstt - 1) & 7;
    env->fpregs[new_fpstt].d = helper_fldt(env, ptr);
    env->fpregs[new_fpstt].d = helper_fldt(env, ptr, GETPC());
    env->fpstt = new_fpstt;
    env->fptags[new_fpstt] = 0; /* validate stack entry */
}

void helper_fstt_ST0(CPUX86State *env, target_ulong ptr)
{
    helper_fstt(env, ST0, ptr);
    helper_fstt(env, ST0, ptr, GETPC());
}

void helper_fpush(CPUX86State *env)
@@ -603,7 +605,7 @@ void helper_fclex(CPUX86State *env)
void helper_fwait(CPUX86State *env)
{
    if (env->fpus & FPUS_SE) {
        fpu_raise_exception(env);
        fpu_raise_exception(env, GETPC());
    }
}

@@ -633,11 +635,11 @@ void helper_fbld_ST0(CPUX86State *env, target_ulong ptr)

    val = 0;
    for (i = 8; i >= 0; i--) {
        v = cpu_ldub_data(env, ptr + i);
        v = cpu_ldub_data_ra(env, ptr + i, GETPC());
        val = (val * 100) + ((v >> 4) * 10) + (v & 0xf);
    }
    tmp = int64_to_floatx80(val, &env->fp_status);
    if (cpu_ldub_data(env, ptr + 9) & 0x80) {
    if (cpu_ldub_data_ra(env, ptr + 9, GETPC()) & 0x80) {
        tmp = floatx80_chs(tmp);
    }
    fpush(env);
@@ -654,10 +656,10 @@ void helper_fbst_ST0(CPUX86State *env, target_ulong ptr)
    mem_ref = ptr;
    mem_end = mem_ref + 9;
    if (val < 0) {
        cpu_stb_data(env, mem_end, 0x80);
        cpu_stb_data_ra(env, mem_end, 0x80, GETPC());
        val = -val;
    } else {
        cpu_stb_data(env, mem_end, 0x00);
        cpu_stb_data_ra(env, mem_end, 0x00, GETPC());
    }
    while (mem_ref < mem_end) {
        if (val == 0) {
@@ -666,10 +668,10 @@ void helper_fbst_ST0(CPUX86State *env, target_ulong ptr)
        v = val % 100;
        val = val / 100;
        v = ((v / 10) << 4) | (v % 10);
        cpu_stb_data(env, mem_ref++, v);
        cpu_stb_data_ra(env, mem_ref++, v, GETPC());
    }
    while (mem_ref < mem_end) {
        cpu_stb_data(env, mem_ref++, 0);
        cpu_stb_data_ra(env, mem_ref++, 0, GETPC());
    }
}

@@ -977,7 +979,8 @@ void helper_fxam_ST0(CPUX86State *env)
    }
}

void helper_fstenv(CPUX86State *env, target_ulong ptr, int data32)
static void do_fstenv(CPUX86State *env, target_ulong ptr, int data32,
                      uintptr_t retaddr)
{
    int fpus, fptag, exp, i;
    uint64_t mant;
@@ -1005,37 +1008,43 @@ void helper_fstenv(CPUX86State *env, target_ulong ptr, int data32)
    }
    if (data32) {
        /* 32 bit */
        cpu_stl_data(env, ptr, env->fpuc);
        cpu_stl_data(env, ptr + 4, fpus);
        cpu_stl_data(env, ptr + 8, fptag);
        cpu_stl_data(env, ptr + 12, 0); /* fpip */
        cpu_stl_data(env, ptr + 16, 0); /* fpcs */
        cpu_stl_data(env, ptr + 20, 0); /* fpoo */
        cpu_stl_data(env, ptr + 24, 0); /* fpos */
        cpu_stl_data_ra(env, ptr, env->fpuc, retaddr);
        cpu_stl_data_ra(env, ptr + 4, fpus, retaddr);
        cpu_stl_data_ra(env, ptr + 8, fptag, retaddr);
        cpu_stl_data_ra(env, ptr + 12, 0, retaddr); /* fpip */
        cpu_stl_data_ra(env, ptr + 16, 0, retaddr); /* fpcs */
        cpu_stl_data_ra(env, ptr + 20, 0, retaddr); /* fpoo */
        cpu_stl_data_ra(env, ptr + 24, 0, retaddr); /* fpos */
    } else {
        /* 16 bit */
        cpu_stw_data(env, ptr, env->fpuc);
        cpu_stw_data(env, ptr + 2, fpus);
        cpu_stw_data(env, ptr + 4, fptag);
        cpu_stw_data(env, ptr + 6, 0);
        cpu_stw_data(env, ptr + 8, 0);
        cpu_stw_data(env, ptr + 10, 0);
        cpu_stw_data(env, ptr + 12, 0);
        cpu_stw_data_ra(env, ptr, env->fpuc, retaddr);
        cpu_stw_data_ra(env, ptr + 2, fpus, retaddr);
        cpu_stw_data_ra(env, ptr + 4, fptag, retaddr);
        cpu_stw_data_ra(env, ptr + 6, 0, retaddr);
        cpu_stw_data_ra(env, ptr + 8, 0, retaddr);
        cpu_stw_data_ra(env, ptr + 10, 0, retaddr);
        cpu_stw_data_ra(env, ptr + 12, 0, retaddr);
    }
}

void helper_fldenv(CPUX86State *env, target_ulong ptr, int data32)
void helper_fstenv(CPUX86State *env, target_ulong ptr, int data32)
{
    do_fstenv(env, ptr, data32, GETPC());
}

static void do_fldenv(CPUX86State *env, target_ulong ptr, int data32,
                      uintptr_t retaddr)
{
    int i, fpus, fptag;

    if (data32) {
        cpu_set_fpuc(env, cpu_lduw_data(env, ptr));
        fpus = cpu_lduw_data(env, ptr + 4);
        fptag = cpu_lduw_data(env, ptr + 8);
        cpu_set_fpuc(env, cpu_lduw_data_ra(env, ptr, retaddr));
        fpus = cpu_lduw_data_ra(env, ptr + 4, retaddr);
        fptag = cpu_lduw_data_ra(env, ptr + 8, retaddr);
    } else {
        cpu_set_fpuc(env, cpu_lduw_data(env, ptr));
        fpus = cpu_lduw_data(env, ptr + 2);
        fptag = cpu_lduw_data(env, ptr + 4);
        cpu_set_fpuc(env, cpu_lduw_data_ra(env, ptr, retaddr));
        fpus = cpu_lduw_data_ra(env, ptr + 2, retaddr);
        fptag = cpu_lduw_data_ra(env, ptr + 4, retaddr);
    }
    env->fpstt = (fpus >> 11) & 7;
    env->fpus = fpus & ~0x3800;
@@ -1045,17 +1054,22 @@ void helper_fldenv(CPUX86State *env, target_ulong ptr, int data32)
    }
}

void helper_fldenv(CPUX86State *env, target_ulong ptr, int data32)
{
    do_fldenv(env, ptr, data32, GETPC());
}

void helper_fsave(CPUX86State *env, target_ulong ptr, int data32)
{
    floatx80 tmp;
    int i;

    helper_fstenv(env, ptr, data32);
    do_fstenv(env, ptr, data32, GETPC());

    ptr += (14 << data32);
    for (i = 0; i < 8; i++) {
        tmp = ST(i);
        helper_fstt(env, tmp, ptr);
        helper_fstt(env, tmp, ptr, GETPC());
        ptr += 10;
    }

@@ -1078,11 +1092,11 @@ void helper_frstor(CPUX86State *env, target_ulong ptr, int data32)
    floatx80 tmp;
    int i;

    helper_fldenv(env, ptr, data32);
    do_fldenv(env, ptr, data32, GETPC());
    ptr += (14 << data32);

    for (i = 0; i < 8; i++) {
        tmp = helper_fldt(env, ptr);
        tmp = helper_fldt(env, ptr, GETPC());
        ST(i) = tmp;
        ptr += 10;
    }
@@ -1100,7 +1114,8 @@ void cpu_x86_frstor(CPUX86State *env, target_ulong ptr, int data32)
}
#endif

void helper_fxsave(CPUX86State *env, target_ulong ptr, int data64)
static void do_fxsave(CPUX86State *env, target_ulong ptr, int data64,
                      uintptr_t retaddr)
{
    int fpus, fptag, i, nb_xmm_regs;
    floatx80 tmp;
@@ -1108,7 +1123,7 @@ void helper_fxsave(CPUX86State *env, target_ulong ptr, int data64)

    /* The operand must be 16 byte aligned */
    if (ptr & 0xf) {
        raise_exception(env, EXCP0D_GPF);
        raise_exception_ra(env, EXCP0D_GPF, retaddr);
    }

    fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
@@ -1116,33 +1131,33 @@ void helper_fxsave(CPUX86State *env, target_ulong ptr, int data64)
    for (i = 0; i < 8; i++) {
        fptag |= (env->fptags[i] << i);
    }
    cpu_stw_data(env, ptr, env->fpuc);
    cpu_stw_data(env, ptr + 2, fpus);
    cpu_stw_data(env, ptr + 4, fptag ^ 0xff);
    cpu_stw_data_ra(env, ptr, env->fpuc, retaddr);
    cpu_stw_data_ra(env, ptr + 2, fpus, retaddr);
    cpu_stw_data_ra(env, ptr + 4, fptag ^ 0xff, retaddr);
#ifdef TARGET_X86_64
    if (data64) {
        cpu_stq_data(env, ptr + 0x08, 0); /* rip */
        cpu_stq_data(env, ptr + 0x10, 0); /* rdp */
        cpu_stq_data_ra(env, ptr + 0x08, 0, retaddr); /* rip */
        cpu_stq_data_ra(env, ptr + 0x10, 0, retaddr); /* rdp */
    } else
#endif
    {
        cpu_stl_data(env, ptr + 0x08, 0); /* eip */
        cpu_stl_data(env, ptr + 0x0c, 0); /* sel  */
        cpu_stl_data(env, ptr + 0x10, 0); /* dp */
        cpu_stl_data(env, ptr + 0x14, 0); /* sel  */
        cpu_stl_data_ra(env, ptr + 0x08, 0, retaddr); /* eip */
        cpu_stl_data_ra(env, ptr + 0x0c, 0, retaddr); /* sel  */
        cpu_stl_data_ra(env, ptr + 0x10, 0, retaddr); /* dp */
        cpu_stl_data_ra(env, ptr + 0x14, 0, retaddr); /* sel  */
    }

    addr = ptr + 0x20;
    for (i = 0; i < 8; i++) {
        tmp = ST(i);
        helper_fstt(env, tmp, addr);
        helper_fstt(env, tmp, addr, retaddr);
        addr += 16;
    }

    if (env->cr[4] & CR4_OSFXSR_MASK) {
        /* XXX: finish it */
        cpu_stl_data(env, ptr + 0x18, env->mxcsr); /* mxcsr */
        cpu_stl_data(env, ptr + 0x1c, 0x0000ffff); /* mxcsr_mask */
        cpu_stl_data_ra(env, ptr + 0x18, env->mxcsr, retaddr); /* mxcsr */
        cpu_stl_data_ra(env, ptr + 0x1c, 0x0000ffff, retaddr); /* mxcsr_mask */
        if (env->hflags & HF_CS64_MASK) {
            nb_xmm_regs = 16;
        } else {
@@ -1154,15 +1169,21 @@ void helper_fxsave(CPUX86State *env, target_ulong ptr, int data64)
            || (env->hflags & HF_CPL_MASK)
            || !(env->hflags & HF_LMA_MASK)) {
            for (i = 0; i < nb_xmm_regs; i++) {
                cpu_stq_data(env, addr, env->xmm_regs[i].XMM_Q(0));
                cpu_stq_data(env, addr + 8, env->xmm_regs[i].XMM_Q(1));
                cpu_stq_data_ra(env, addr, env->xmm_regs[i].XMM_Q(0), retaddr);
                cpu_stq_data_ra(env, addr + 8, env->xmm_regs[i].XMM_Q(1), retaddr);
                addr += 16;
            }
        }
    }
}

void helper_fxrstor(CPUX86State *env, target_ulong ptr, int data64)
void helper_fxsave(CPUX86State *env, target_ulong ptr, int data64)
{
    do_fxsave(env, ptr, data64, GETPC());
}

static void do_fxrstor(CPUX86State *env, target_ulong ptr, int data64,
                       uintptr_t retaddr)
{
    int i, fpus, fptag, nb_xmm_regs;
    floatx80 tmp;
@@ -1170,12 +1191,12 @@ void helper_fxrstor(CPUX86State *env, target_ulong ptr, int data64)

    /* The operand must be 16 byte aligned */
    if (ptr & 0xf) {
        raise_exception(env, EXCP0D_GPF);
        raise_exception_ra(env, EXCP0D_GPF, retaddr);
    }

    cpu_set_fpuc(env, cpu_lduw_data(env, ptr));
    fpus = cpu_lduw_data(env, ptr + 2);
    fptag = cpu_lduw_data(env, ptr + 4);
    cpu_set_fpuc(env, cpu_lduw_data_ra(env, ptr, retaddr));
    fpus = cpu_lduw_data_ra(env, ptr + 2, retaddr);
    fptag = cpu_lduw_data_ra(env, ptr + 4, retaddr);
    env->fpstt = (fpus >> 11) & 7;
    env->fpus = fpus & ~0x3800;
    fptag ^= 0xff;
@@ -1185,15 +1206,15 @@ void helper_fxrstor(CPUX86State *env, target_ulong ptr, int data64)

    addr = ptr + 0x20;
    for (i = 0; i < 8; i++) {
        tmp = helper_fldt(env, addr);
        tmp = helper_fldt(env, addr, retaddr);
        ST(i) = tmp;
        addr += 16;
    }

    if (env->cr[4] & CR4_OSFXSR_MASK) {
        /* XXX: finish it */
        cpu_set_mxcsr(env, cpu_ldl_data(env, ptr + 0x18));
        /* cpu_ldl_data(env, ptr + 0x1c); */
        cpu_set_mxcsr(env, cpu_ldl_data_ra(env, ptr + 0x18, retaddr));
        /* cpu_ldl_data_ra(env, ptr + 0x1c, retaddr); */
        if (env->hflags & HF_CS64_MASK) {
            nb_xmm_regs = 16;
        } else {
@@ -1205,14 +1226,19 @@ void helper_fxrstor(CPUX86State *env, target_ulong ptr, int data64)
            || (env->hflags & HF_CPL_MASK)
            || !(env->hflags & HF_LMA_MASK)) {
            for (i = 0; i < nb_xmm_regs; i++) {
                env->xmm_regs[i].XMM_Q(0) = cpu_ldq_data(env, addr);
                env->xmm_regs[i].XMM_Q(1) = cpu_ldq_data(env, addr + 8);
                env->xmm_regs[i].XMM_Q(0) = cpu_ldq_data_ra(env, addr, retaddr);
                env->xmm_regs[i].XMM_Q(1) = cpu_ldq_data_ra(env, addr + 8, retaddr);
                addr += 16;
            }
        }
    }
}

void helper_fxrstor(CPUX86State *env, target_ulong ptr, int data64)
{
    do_fxrstor(env, ptr, data64, GETPC());
}

void cpu_get_fp80(uint64_t *pmant, uint16_t *pexp, floatx80 f)
{
    CPU_LDoubleU temp;
+0 −24
Original line number Diff line number Diff line
@@ -5836,8 +5836,6 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
                }
                break;
            case 0x0c: /* fldenv mem */
                gen_update_cc_op(s);
                gen_jmp_im(pc_start - s->cs_base);
                gen_helper_fldenv(cpu_env, cpu_A0, tcg_const_i32(dflag - 1));
                break;
            case 0x0d: /* fldcw mem */
@@ -5846,8 +5844,6 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
                gen_helper_fldcw(cpu_env, cpu_tmp2_i32);
                break;
            case 0x0e: /* fnstenv mem */
                gen_update_cc_op(s);
                gen_jmp_im(pc_start - s->cs_base);
                gen_helper_fstenv(cpu_env, cpu_A0, tcg_const_i32(dflag - 1));
                break;
            case 0x0f: /* fnstcw mem */
@@ -5856,24 +5852,16 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
                                    s->mem_index, MO_LEUW);
                break;
            case 0x1d: /* fldt mem */
                gen_update_cc_op(s);
                gen_jmp_im(pc_start - s->cs_base);
                gen_helper_fldt_ST0(cpu_env, cpu_A0);
                break;
            case 0x1f: /* fstpt mem */
                gen_update_cc_op(s);
                gen_jmp_im(pc_start - s->cs_base);
                gen_helper_fstt_ST0(cpu_env, cpu_A0);
                gen_helper_fpop(cpu_env);
                break;
            case 0x2c: /* frstor mem */
                gen_update_cc_op(s);
                gen_jmp_im(pc_start - s->cs_base);
                gen_helper_frstor(cpu_env, cpu_A0, tcg_const_i32(dflag - 1));
                break;
            case 0x2e: /* fnsave mem */
                gen_update_cc_op(s);
                gen_jmp_im(pc_start - s->cs_base);
                gen_helper_fsave(cpu_env, cpu_A0, tcg_const_i32(dflag - 1));
                break;
            case 0x2f: /* fnstsw mem */
@@ -5882,13 +5870,9 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
                                    s->mem_index, MO_LEUW);
                break;
            case 0x3c: /* fbld */
                gen_update_cc_op(s);
                gen_jmp_im(pc_start - s->cs_base);
                gen_helper_fbld_ST0(cpu_env, cpu_A0);
                break;
            case 0x3e: /* fbstp */
                gen_update_cc_op(s);
                gen_jmp_im(pc_start - s->cs_base);
                gen_helper_fbst_ST0(cpu_env, cpu_A0);
                gen_helper_fpop(cpu_env);
                break;
@@ -5923,8 +5907,6 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
                switch(rm) {
                case 0: /* fnop */
                    /* check exceptions (FreeBSD FPU probe) */
                    gen_update_cc_op(s);
                    gen_jmp_im(pc_start - s->cs_base);
                    gen_helper_fwait(cpu_env);
                    break;
                default:
@@ -6894,8 +6876,6 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
            (HF_MP_MASK | HF_TS_MASK)) {
            gen_exception(s, EXCP07_PREX, pc_start - s->cs_base);
        } else {
            gen_update_cc_op(s);
            gen_jmp_im(pc_start - s->cs_base);
            gen_helper_fwait(cpu_env);
        }
        break;
@@ -7725,8 +7705,6 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
                break;
            }
            gen_lea_modrm(env, s, modrm);
            gen_update_cc_op(s);
            gen_jmp_im(pc_start - s->cs_base);
            gen_helper_fxsave(cpu_env, cpu_A0, tcg_const_i32(dflag == MO_64));
            break;
        case 1: /* fxrstor */
@@ -7738,8 +7716,6 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
                break;
            }
            gen_lea_modrm(env, s, modrm);
            gen_update_cc_op(s);
            gen_jmp_im(pc_start - s->cs_base);
            gen_helper_fxrstor(cpu_env, cpu_A0, tcg_const_i32(dflag == MO_64));
            break;
        case 2: /* ldmxcsr */