Commit 6c84ce0d authored by Hervé Poussineau's avatar Hervé Poussineau Committed by Andreas Färber
Browse files

prep: Move int-ack register from PReP to Raven PCI emulation 



Register is one byte-wide (as per specification), so there is no need
to specify endianness.

Signed-off-by: default avatarHervé Poussineau <hpoussin@reactos.org>
[AF: Limit access validity to size 1]
Signed-off-by: default avatarAndreas Färber <andreas.faerber@web.de>
parent 9357b144

hw/ppc_prep.c

+0 −36
Original line number Diff line number Diff line
@@ -86,38 +86,6 @@ static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 }; 
/* ISA IO ports bridge */

#define PPC_IO_BASE 0x80000000



/* PCI intack register */

/* Read-only register (?) */

static void PPC_intack_write (void *opaque, target_phys_addr_t addr,

                              uint64_t value, unsigned size)

{

#if 0

    printf("%s: 0x" TARGET_FMT_plx " => 0x%08" PRIx64 "\n", __func__, addr,

           value);

#endif

}



static uint64_t PPC_intack_read(void *opaque, target_phys_addr_t addr,

                                unsigned size)

{

    uint32_t retval = 0;



    if ((addr & 0xf) == 0)

        retval = pic_read_irq(isa_pic);

#if 0

    printf("%s: 0x" TARGET_FMT_plx " <= %08" PRIx32 "\n", __func__, addr,

           retval);

#endif



    return retval;

}



static const MemoryRegionOps PPC_intack_ops = {

    .read = PPC_intack_read,

    .write = PPC_intack_write,

    .endianness = DEVICE_LITTLE_ENDIAN,

};



/* PowerPC control and status registers */

#if 0 // Not used

static struct {
@@ -492,7 +460,6 @@ static void ppc_prep_init (ram_addr_t ram_size, 
    nvram_t nvram;

    M48t59State *m48t59;

    MemoryRegion *PPC_io_memory = g_new(MemoryRegion, 1);

    MemoryRegion *intack = g_new(MemoryRegion, 1);

#if 0

    MemoryRegion *xcsr = g_new(MemoryRegion, 1);

#endif
@@ -685,9 +652,6 @@ static void ppc_prep_init (ram_addr_t ram_size, 
    register_ioport_write(0x0092, 0x01, 1, &PREP_io_800_writeb, sysctrl);

    register_ioport_read(0x0800, 0x52, 1, &PREP_io_800_readb, sysctrl);

    register_ioport_write(0x0800, 0x52, 1, &PREP_io_800_writeb, sysctrl);

    /* PCI intack location */

    memory_region_init_io(intack, &PPC_intack_ops, NULL, "ppc-intack", 4);

    memory_region_add_subregion(sysmem, 0xBFFFFFF0, intack);

    /* PowerPC control and status register group */

#if 0

    memory_region_init_io(xcsr, &PPC_XCSR_ops, NULL, "ppc-xcsr", 0x1000);

hw/prep_pci.c

+17 −0
Original line number Diff line number Diff line
@@ -25,10 +25,12 @@ 
#include "hw.h"

#include "pci.h"

#include "pci_host.h"

#include "pc.h"

#include "exec-memory.h"



typedef struct PRePPCIState {

    PCIHostState host_state;

    MemoryRegion intack;

    qemu_irq irq[4];

} PREPPCIState;
@@ -67,6 +69,19 @@ static const MemoryRegionOps PPC_PCIIO_ops = { 
    .endianness = DEVICE_LITTLE_ENDIAN,

};



static uint64_t ppc_intack_read(void *opaque, target_phys_addr_t addr,

                                unsigned int size)

{

    return pic_read_irq(isa_pic);

}



static const MemoryRegionOps PPC_intack_ops = {

    .read = ppc_intack_read,

    .valid = {

        .max_access_size = 1,

    },

};



static int prep_map_irq(PCIDevice *pci_dev, int irq_num)

{

    return (irq_num + (pci_dev->devfn >> 3)) & 1;
@@ -110,6 +125,8 @@ static int raven_pcihost_init(SysBusDevice *dev) 
    memory_region_init_io(&h->mmcfg, &PPC_PCIIO_ops, s, "pciio", 0x00400000);

    memory_region_add_subregion(address_space_mem, 0x80800000, &h->mmcfg);



    memory_region_init_io(&s->intack, &PPC_intack_ops, s, "pci-intack", 1);

    memory_region_add_subregion(address_space_mem, 0xbffffff0, &s->intack);

    pci_create_simple(bus, 0, "raven");



    return 0;