Commit 6ba28ddb authored by Alex Bennée's avatar Alex Bennée Committed by Peter Maydell
Browse files

target/arm: Implement FMOV (immediate) for fp16 



All the hard work is already done by vfp_expand_imm, we just need to
make sure we pick up the correct size.

Cc: qemu-stable@nongnu.org
Reviewed-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: default avatarAlex Bennée <alex.bennee@linaro.org>
Tested-by: default avatarAlex Bennée <alex.bennee@linaro.org>
Signed-off-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Message-id: 20180512003217.9105-11-richard.henderson@linaro.org
[rth: Merge unallocated_encoding check with TCGMemOp conversion.]
Signed-off-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent ace97fee

target/arm/translate-a64.c

+17 −3
Original line number Diff line number Diff line
@@ -5674,11 +5674,25 @@ static void disas_fp_imm(DisasContext *s, uint32_t insn) 
{

    int rd = extract32(insn, 0, 5);

    int imm8 = extract32(insn, 13, 8);

    int is_double = extract32(insn, 22, 2);

    int type = extract32(insn, 22, 2);

    uint64_t imm;

    TCGv_i64 tcg_res;

    TCGMemOp sz;



    if (is_double > 1) {

    switch (type) {

    case 0:

        sz = MO_32;

        break;

    case 1:

        sz = MO_64;

        break;

    case 3:

        sz = MO_16;

        if (arm_dc_feature(s, ARM_FEATURE_V8_FP16)) {

            break;

        }

        /* fallthru */

    default:

        unallocated_encoding(s);

        return;

    }
@@ -5687,7 +5701,7 @@ static void disas_fp_imm(DisasContext *s, uint32_t insn) 
        return;

    }



    imm = vfp_expand_imm(MO_32 + is_double, imm8);

    imm = vfp_expand_imm(sz, imm8);



    tcg_res = tcg_const_i64(imm);

    write_fp_dreg(s, rd, tcg_res);