Commit 6a5d2208 authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-pull-request' into staging



Trivial fixes (20191105-v3)

v3: remove disas/libvixl/vixl/invalset.h changes
v2: remove patch from Greg that has lines with more than 80 columns

# gpg: Signature made Wed 06 Nov 2019 16:23:45 GMT
# gpg:                using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg:                issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* remotes/vivier2/tags/trivial-branch-pull-request:
  global: Squash 'the the'
  hw/misc/grlib_ahb_apb_pnp: Fix 8-bit accesses
  hw/misc/grlib_ahb_apb_pnp: Avoid crash when writing to PnP registers

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents 763657b1 df59feb1
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+1 −1
Original line number Diff line number Diff line
@@ -10,7 +10,7 @@ can delegate implementation of persistent reservations to an external
restricting access to block devices to specific initiators in a shared
storage setup.

For a more detailed reference please refer the the SCSI Primary
For a more detailed reference please refer to the SCSI Primary
Commands standard, specifically the section on Reservations and the
"PERSISTENT RESERVE IN" and "PERSISTENT RESERVE OUT" commands.

+1 −1
Original line number Diff line number Diff line
@@ -385,7 +385,7 @@ Each LMB list entry consists of the following elements:
  is used to retrieve the right associativity list to be used for this
  LMB.
- A 32bit flags word. The bit at bit position 0x00000008 defines whether
  the LMB is assigned to the the partition as of boot time.
  the LMB is assigned to the partition as of boot time.

ibm,dynamic-memory-v2

+1 −1
Original line number Diff line number Diff line
@@ -163,7 +163,7 @@ Interrupt Priority Register (PIPR) is also updated using the IPB. This
register represent the priority of the most favored pending
notification.

The PIPR is then compared to the the Current Processor Priority
The PIPR is then compared to the Current Processor Priority
Register (CPPR). If it is more favored (numerically less than), the
CPU interrupt line is raised and the EO bit of the Notification Source
Register (NSR) is updated to notify the presence of an exception for
+1 −1
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@@ -89,7 +89,7 @@ TPM upon reboot. The PPI specification defines the operation requests and the
actions the firmware has to take. The system administrator passes the operation
request number to the firmware through an ACPI interface which writes this
number to a memory location that the firmware knows. Upon reboot, the firmware
finds the number and sends commands to the the TPM. The firmware writes the TPM
finds the number and sends commands to the TPM. The firmware writes the TPM
result code and the operation request number to a memory location that ACPI can
read from and pass the result on to the administrator.

+12 −0
Original line number Diff line number Diff line
@@ -22,6 +22,7 @@
 */

#include "qemu/osdep.h"
#include "qemu/log.h"
#include "hw/sysbus.h"
#include "hw/misc/grlib_ahb_apb_pnp.h"

@@ -231,9 +232,20 @@ static uint64_t grlib_apb_pnp_read(void *opaque, hwaddr offset, unsigned size)
    return apb_pnp->regs[offset >> 2];
}

static void grlib_apb_pnp_write(void *opaque, hwaddr addr,
                                uint64_t val, unsigned size)
{
    qemu_log_mask(LOG_UNIMP, "%s not implemented\n", __func__);
}

static const MemoryRegionOps grlib_apb_pnp_ops = {
    .read       = grlib_apb_pnp_read,
    .write      = grlib_apb_pnp_write,
    .endianness = DEVICE_BIG_ENDIAN,
    .impl = {
        .min_access_size = 4,
        .max_access_size = 4,
    },
};

static void grlib_apb_pnp_realize(DeviceState *dev, Error **errp)
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