Commit 6a4992d0 authored by Anthony Liguori's avatar Anthony Liguori
Browse files

Merge remote-tracking branch 'afaerber/tags/qom-devices-for-anthony' into staging 

QOM device refactorings

* Replace all uses of FROM_SYSBUS() macro with QOM cast macros
  i) "QOM cast cleanup for X"
     Indicates a mechanical 1:1 between TYPE_* and *State.
  ii) "QOM'ify X and Y"
      Indicates abstract types may have been inserted or similar changes
      to type hierarchy.
  ii) Renames
      Coding Style fixes such as CamelCase have been applied in some cases.
* Fix for sparc floppy - cf. ii) above
* Change PCI type hierarchy to provide PCI_BRIDGE() casts
* In doing so, prepare for adopting QOM realize

# gpg: Signature made Mon 29 Jul 2013 02:15:22 PM CDT using RSA key ID 3E7E013F
# gpg: Can't check signature: public key not found

# By Andreas Färber (171) and others
# Via Andreas Färber
* afaerber/tags/qom-devices-for-anthony: (173 commits)
  sysbus: QOM parent field cleanup for SysBusDevice
  spapr_pci: QOM cast cleanup
  ioapic: QOM cast cleanup
  kvm/ioapic: QOM cast cleanup
  kvmvapic: QOM cast cleanup
  mipsnet: QOM cast cleanup
  opencores_eth: QOM cast cleanup
  exynos4210_i2c: QOM cast cleanup
  sysbus: Remove unused sysbus_new() prototype
  sysbus: Drop FROM_SYSBUS()
  xilinx_timer: QOM cast cleanup
  tusb6010: QOM cast cleanup
  slavio_timer: QOM cast cleanup
  pxa2xx_timer: QOM'ify pxa25x-timer and pxa27x-timer
  puv3_ost: QOM cast cleanup
  pl031: QOM cast cleanup
  pl031: Rename pl031_state to PL031State
  milkymist-sysctl: QOM cast cleanup
  m48t59: QOM cast cleanup for M48t59SysBusState
  lm32_timer: QOM cast cleanup
  ...
parents eddbf0ab b67964d7

MAINTAINERS

+1 −0
Original line number Diff line number Diff line
@@ -80,6 +80,7 @@ M: Michael Walle <michael@walle.cc> 
S: Maintained

F: target-lm32/

F: hw/lm32/

F: hw/char/lm32_*



M68K

M: Paul Brook <paul@codesourcery.com>

hw/arm/armv7m.c

+11 −5
Original line number Diff line number Diff line
@@ -114,15 +114,21 @@ static const MemoryRegionOps bitband_ops = { 
    .endianness = DEVICE_NATIVE_ENDIAN,

};



#define TYPE_BITBAND "ARM,bitband-memory"

#define BITBAND(obj) OBJECT_CHECK(BitBandState, (obj), TYPE_BITBAND)



typedef struct {

    SysBusDevice busdev;

    /*< private >*/

    SysBusDevice parent_obj;

    /*< public >*/



    MemoryRegion iomem;

    uint32_t base;

} BitBandState;



static int bitband_init(SysBusDevice *dev)

{

    BitBandState *s = FROM_SYSBUS(BitBandState, dev);

    BitBandState *s = BITBAND(dev);



    memory_region_init_io(&s->iomem, OBJECT(s), &bitband_ops, &s->base,

                          "bitband", 0x02000000);
@@ -134,12 +140,12 @@ static void armv7m_bitband_init(void) 
{

    DeviceState *dev;



    dev = qdev_create(NULL, "ARM,bitband-memory");

    dev = qdev_create(NULL, TYPE_BITBAND);

    qdev_prop_set_uint32(dev, "base", 0x20000000);

    qdev_init_nofail(dev);

    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x22000000);



    dev = qdev_create(NULL, "ARM,bitband-memory");

    dev = qdev_create(NULL, TYPE_BITBAND);

    qdev_prop_set_uint32(dev, "base", 0x40000000);

    qdev_init_nofail(dev);

    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x42000000);
@@ -270,7 +276,7 @@ static void bitband_class_init(ObjectClass *klass, void *data) 
}



static const TypeInfo bitband_info = {

    .name          = "ARM,bitband-memory",

    .name          = TYPE_BITBAND,

    .parent        = TYPE_SYS_BUS_DEVICE,

    .instance_size = sizeof(BitBandState),

    .class_init    = bitband_class_init,

hw/arm/highbank.c

+11 −5
Original line number Diff line number Diff line
@@ -116,8 +116,15 @@ static const MemoryRegionOps hb_mem_ops = { 
    .endianness = DEVICE_NATIVE_ENDIAN,

};



#define TYPE_HIGHBANK_REGISTERS "highbank-regs"

#define HIGHBANK_REGISTERS(obj) \

    OBJECT_CHECK(HighbankRegsState, (obj), TYPE_HIGHBANK_REGISTERS)



typedef struct {

    SysBusDevice busdev;

    /*< private >*/

    SysBusDevice parent_obj;

    /*< public >*/



    MemoryRegion *iomem;

    uint32_t regs[NUM_REGS];

} HighbankRegsState;
@@ -135,8 +142,7 @@ static VMStateDescription vmstate_highbank_regs = { 


static void highbank_regs_reset(DeviceState *dev)

{

    SysBusDevice *sys_dev = SYS_BUS_DEVICE(dev);

    HighbankRegsState *s = FROM_SYSBUS(HighbankRegsState, sys_dev);

    HighbankRegsState *s = HIGHBANK_REGISTERS(dev);



    s->regs[0x40] = 0x05F20121;

    s->regs[0x41] = 0x2;
@@ -146,7 +152,7 @@ static void highbank_regs_reset(DeviceState *dev) 


static int highbank_regs_init(SysBusDevice *dev)

{

    HighbankRegsState *s = FROM_SYSBUS(HighbankRegsState, dev);

    HighbankRegsState *s = HIGHBANK_REGISTERS(dev);



    s->iomem = g_new(MemoryRegion, 1);

    memory_region_init_io(s->iomem, OBJECT(s), &hb_mem_ops, s->regs,
@@ -168,7 +174,7 @@ static void highbank_regs_class_init(ObjectClass *klass, void *data) 
}



static const TypeInfo highbank_regs_info = {

    .name          = "highbank-regs",

    .name          = TYPE_HIGHBANK_REGISTERS,

    .parent        = TYPE_SYS_BUS_DEVICE,

    .instance_size = sizeof(HighbankRegsState),

    .class_init    = highbank_regs_class_init,

hw/arm/integratorcp.c

+45 −31
Original line number Diff line number Diff line
@@ -15,8 +15,15 @@ 
#include "exec/address-spaces.h"

#include "sysemu/sysemu.h"



typedef struct {

    SysBusDevice busdev;

#define TYPE_INTEGRATOR_CM "integrator_core"

#define INTEGRATOR_CM(obj) \

    OBJECT_CHECK(IntegratorCMState, (obj), TYPE_INTEGRATOR_CM)



typedef struct IntegratorCMState {

    /*< private >*/

    SysBusDevice parent_obj;

    /*< public >*/



    MemoryRegion iomem;

    uint32_t memsz;

    MemoryRegion flash;
@@ -31,7 +38,7 @@ typedef struct { 
    uint32_t int_level;

    uint32_t irq_enabled;

    uint32_t fiq_enabled;

} integratorcm_state;

} IntegratorCMState;



static uint8_t integrator_spd[128] = {

   128, 8, 4, 11, 9, 1, 64, 0,  2, 0xa0, 0xa0, 0, 0, 8, 0, 1,
@@ -41,7 +48,7 @@ static uint8_t integrator_spd[128] = { 
static uint64_t integratorcm_read(void *opaque, hwaddr offset,

                                  unsigned size)

{

    integratorcm_state *s = (integratorcm_state *)opaque;

    IntegratorCMState *s = opaque;

    if (offset >= 0x100 && offset < 0x200) {

        /* CM_SPD */

        if (offset >= 0x180)
@@ -108,7 +115,7 @@ static uint64_t integratorcm_read(void *opaque, hwaddr offset, 
    }

}



static void integratorcm_do_remap(integratorcm_state *s)

static void integratorcm_do_remap(IntegratorCMState *s)

{

    /* Sync memory region state with CM_CTRL REMAP bit:

     * bit 0 => flash at address 0; bit 1 => RAM
@@ -116,7 +123,7 @@ static void integratorcm_do_remap(integratorcm_state *s) 
    memory_region_set_enabled(&s->flash, !(s->cm_ctrl & 4));

}



static void integratorcm_set_ctrl(integratorcm_state *s, uint32_t value)

static void integratorcm_set_ctrl(IntegratorCMState *s, uint32_t value)

{

    if (value & 8) {

        qemu_system_reset_request();
@@ -133,7 +140,7 @@ static void integratorcm_set_ctrl(integratorcm_state *s, uint32_t value) 
    integratorcm_do_remap(s);

}



static void integratorcm_update(integratorcm_state *s)

static void integratorcm_update(IntegratorCMState *s)

{

    /* ??? The CPU irq/fiq is raised when either the core module or base PIC

       are active.  */
@@ -144,7 +151,7 @@ static void integratorcm_update(integratorcm_state *s) 
static void integratorcm_write(void *opaque, hwaddr offset,

                               uint64_t value, unsigned size)

{

    integratorcm_state *s = (integratorcm_state *)opaque;

    IntegratorCMState *s = opaque;

    switch (offset >> 2) {

    case 2: /* CM_OSC */

        if (s->cm_lock == 0xa05f)
@@ -226,7 +233,7 @@ static const MemoryRegionOps integratorcm_ops = { 


static int integratorcm_init(SysBusDevice *dev)

{

    integratorcm_state *s = FROM_SYSBUS(integratorcm_state, dev);

    IntegratorCMState *s = INTEGRATOR_CM(dev);



    s->cm_osc = 0x01000048;

    /* ??? What should the high bits of this value be?  */
@@ -264,9 +271,15 @@ static int integratorcm_init(SysBusDevice *dev) 
/* Integrator/CP hardware emulation.  */

/* Primary interrupt controller.  */



typedef struct icp_pic_state

{

  SysBusDevice busdev;

#define TYPE_INTEGRATOR_PIC "integrator_pic"

#define INTEGRATOR_PIC(obj) \

   OBJECT_CHECK(icp_pic_state, (obj), TYPE_INTEGRATOR_PIC)



typedef struct icp_pic_state {

    /*< private >*/

    SysBusDevice parent_obj;

    /*< public >*/



    MemoryRegion iomem;

    uint32_t level;

    uint32_t irq_enabled;
@@ -367,16 +380,17 @@ static const MemoryRegionOps icp_pic_ops = { 
    .endianness = DEVICE_NATIVE_ENDIAN,

};



static int icp_pic_init(SysBusDevice *dev)

static int icp_pic_init(SysBusDevice *sbd)

{

    icp_pic_state *s = FROM_SYSBUS(icp_pic_state, dev);

    DeviceState *dev = DEVICE(sbd);

    icp_pic_state *s = INTEGRATOR_PIC(dev);



    qdev_init_gpio_in(&dev->qdev, icp_pic_set_irq, 32);

    sysbus_init_irq(dev, &s->parent_irq);

    sysbus_init_irq(dev, &s->parent_fiq);

    qdev_init_gpio_in(dev, icp_pic_set_irq, 32);

    sysbus_init_irq(sbd, &s->parent_irq);

    sysbus_init_irq(sbd, &s->parent_fiq);

    memory_region_init_io(&s->iomem, OBJECT(s), &icp_pic_ops, s,

                          "icp-pic", 0x00800000);

    sysbus_init_mmio(dev, &s->iomem);

    sysbus_init_mmio(sbd, &s->iomem);

    return 0;

}
@@ -474,19 +488,19 @@ static void integratorcp_init(QEMUMachineInitArgs *args) 
    memory_region_init_alias(ram_alias, NULL, "ram.alias", ram, 0, ram_size);

    memory_region_add_subregion(address_space_mem, 0x80000000, ram_alias);



    dev = qdev_create(NULL, "integrator_core");

    dev = qdev_create(NULL, TYPE_INTEGRATOR_CM);

    qdev_prop_set_uint32(dev, "memsz", ram_size >> 20);

    qdev_init_nofail(dev);

    sysbus_mmio_map((SysBusDevice *)dev, 0, 0x10000000);



    cpu_pic = arm_pic_init_cpu(cpu);

    dev = sysbus_create_varargs("integrator_pic", 0x14000000,

    dev = sysbus_create_varargs(TYPE_INTEGRATOR_PIC, 0x14000000,

                                cpu_pic[ARM_PIC_CPU_IRQ],

                                cpu_pic[ARM_PIC_CPU_FIQ], NULL);

    for (i = 0; i < 32; i++) {

        pic[i] = qdev_get_gpio_in(dev, i);

    }

    sysbus_create_simple("integrator_pic", 0xca000000, pic[26]);

    sysbus_create_simple(TYPE_INTEGRATOR_PIC, 0xca000000, pic[26]);

    sysbus_create_varargs("integrator_pit", 0x13000000,

                          pic[5], pic[6], pic[7], NULL);

    sysbus_create_simple("pl031", 0x15000000, pic[8]);
@@ -524,7 +538,7 @@ static void integratorcp_machine_init(void) 
machine_init(integratorcp_machine_init);



static Property core_properties[] = {

    DEFINE_PROP_UINT32("memsz", integratorcm_state, memsz, 0),

    DEFINE_PROP_UINT32("memsz", IntegratorCMState, memsz, 0),

    DEFINE_PROP_END_OF_LIST(),

};
@@ -538,9 +552,9 @@ static void core_class_init(ObjectClass *klass, void *data) 
}



static const TypeInfo core_info = {

    .name          = "integrator_core",

    .name          = TYPE_INTEGRATOR_CM,

    .parent        = TYPE_SYS_BUS_DEVICE,

    .instance_size = sizeof(integratorcm_state),

    .instance_size = sizeof(IntegratorCMState),

    .class_init    = core_class_init,

};
@@ -552,7 +566,7 @@ static void icp_pic_class_init(ObjectClass *klass, void *data) 
}



static const TypeInfo icp_pic_info = {

    .name          = "integrator_pic",

    .name          = TYPE_INTEGRATOR_PIC,

    .parent        = TYPE_SYS_BUS_DEVICE,

    .instance_size = sizeof(icp_pic_state),

    .class_init    = icp_pic_class_init,

hw/arm/musicpal.c

+104 −54
Original line number Diff line number Diff line
@@ -146,8 +146,15 @@ typedef struct mv88w8618_rx_desc { 
    uint32_t next;

} mv88w8618_rx_desc;



#define TYPE_MV88W8618_ETH "mv88w8618_eth"

#define MV88W8618_ETH(obj) \

    OBJECT_CHECK(mv88w8618_eth_state, (obj), TYPE_MV88W8618_ETH)



typedef struct mv88w8618_eth_state {

    SysBusDevice busdev;

    /*< private >*/

    SysBusDevice parent_obj;

    /*< public >*/



    MemoryRegion iomem;

    qemu_irq irq;

    uint32_t smir;
@@ -382,16 +389,17 @@ static NetClientInfo net_mv88w8618_info = { 
    .cleanup = eth_cleanup,

};



static int mv88w8618_eth_init(SysBusDevice *dev)

static int mv88w8618_eth_init(SysBusDevice *sbd)

{

    mv88w8618_eth_state *s = FROM_SYSBUS(mv88w8618_eth_state, dev);

    DeviceState *dev = DEVICE(sbd);

    mv88w8618_eth_state *s = MV88W8618_ETH(dev);



    sysbus_init_irq(dev, &s->irq);

    sysbus_init_irq(sbd, &s->irq);

    s->nic = qemu_new_nic(&net_mv88w8618_info, &s->conf,

                          object_get_typename(OBJECT(dev)), dev->qdev.id, s);

                          object_get_typename(OBJECT(dev)), dev->id, s);

    memory_region_init_io(&s->iomem, OBJECT(s), &mv88w8618_eth_ops, s,

                          "mv88w8618-eth", MP_ETH_SIZE);

    sysbus_init_mmio(dev, &s->iomem);

    sysbus_init_mmio(sbd, &s->iomem);

    return 0;

}
@@ -429,7 +437,7 @@ static void mv88w8618_eth_class_init(ObjectClass *klass, void *data) 
}



static const TypeInfo mv88w8618_eth_info = {

    .name          = "mv88w8618_eth",

    .name          = TYPE_MV88W8618_ETH,

    .parent        = TYPE_SYS_BUS_DEVICE,

    .instance_size = sizeof(mv88w8618_eth_state),

    .class_init    = mv88w8618_eth_class_init,
@@ -454,8 +462,15 @@ static const TypeInfo mv88w8618_eth_info = { 


#define MP_LCD_TEXTCOLOR        0xe0e0ff /* RRGGBB */



#define TYPE_MUSICPAL_LCD "musicpal_lcd"

#define MUSICPAL_LCD(obj) \

    OBJECT_CHECK(musicpal_lcd_state, (obj), TYPE_MUSICPAL_LCD)



typedef struct musicpal_lcd_state {

    SysBusDevice busdev;

    /*< private >*/

    SysBusDevice parent_obj;

    /*< public >*/



    MemoryRegion iomem;

    uint32_t brightness;

    uint32_t mode;
@@ -534,7 +549,7 @@ static void lcd_invalidate(void *opaque) 
{

}



static void musicpal_lcd_gpio_brigthness_in(void *opaque, int irq, int level)

static void musicpal_lcd_gpio_brightness_in(void *opaque, int irq, int level)

{

    musicpal_lcd_state *s = opaque;

    s->brightness &= ~(1 << irq);
@@ -606,20 +621,21 @@ static const GraphicHwOps musicpal_gfx_ops = { 
    .gfx_update  = lcd_refresh,

};



static int musicpal_lcd_init(SysBusDevice *dev)

static int musicpal_lcd_init(SysBusDevice *sbd)

{

    musicpal_lcd_state *s = FROM_SYSBUS(musicpal_lcd_state, dev);

    DeviceState *dev = DEVICE(sbd);

    musicpal_lcd_state *s = MUSICPAL_LCD(dev);



    s->brightness = 7;



    memory_region_init_io(&s->iomem, OBJECT(s), &musicpal_lcd_ops, s,

                          "musicpal-lcd", MP_LCD_SIZE);

    sysbus_init_mmio(dev, &s->iomem);

    sysbus_init_mmio(sbd, &s->iomem);



    s->con = graphic_console_init(DEVICE(dev), &musicpal_gfx_ops, s);

    s->con = graphic_console_init(dev, &musicpal_gfx_ops, s);

    qemu_console_resize(s->con, 128*3, 64*3);



    qdev_init_gpio_in(&dev->qdev, musicpal_lcd_gpio_brigthness_in, 3);

    qdev_init_gpio_in(dev, musicpal_lcd_gpio_brightness_in, 3);



    return 0;

}
@@ -650,7 +666,7 @@ static void musicpal_lcd_class_init(ObjectClass *klass, void *data) 
}



static const TypeInfo musicpal_lcd_info = {

    .name          = "musicpal_lcd",

    .name          = TYPE_MUSICPAL_LCD,

    .parent        = TYPE_SYS_BUS_DEVICE,

    .instance_size = sizeof(musicpal_lcd_state),

    .class_init    = musicpal_lcd_class_init,
@@ -661,9 +677,15 @@ static const TypeInfo musicpal_lcd_info = { 
#define MP_PIC_ENABLE_SET       0x08

#define MP_PIC_ENABLE_CLR       0x0C



typedef struct mv88w8618_pic_state

{

    SysBusDevice busdev;

#define TYPE_MV88W8618_PIC "mv88w8618_pic"

#define MV88W8618_PIC(obj) \

    OBJECT_CHECK(mv88w8618_pic_state, (obj), TYPE_MV88W8618_PIC)



typedef struct mv88w8618_pic_state {

    /*< private >*/

    SysBusDevice parent_obj;

    /*< public >*/



    MemoryRegion iomem;

    uint32_t level;

    uint32_t enabled;
@@ -721,8 +743,7 @@ static void mv88w8618_pic_write(void *opaque, hwaddr offset, 


static void mv88w8618_pic_reset(DeviceState *d)

{

    mv88w8618_pic_state *s = FROM_SYSBUS(mv88w8618_pic_state,

                                         SYS_BUS_DEVICE(d));

    mv88w8618_pic_state *s = MV88W8618_PIC(d);



    s->level = 0;

    s->enabled = 0;
@@ -736,9 +757,9 @@ static const MemoryRegionOps mv88w8618_pic_ops = { 


static int mv88w8618_pic_init(SysBusDevice *dev)

{

    mv88w8618_pic_state *s = FROM_SYSBUS(mv88w8618_pic_state, dev);

    mv88w8618_pic_state *s = MV88W8618_PIC(dev);



    qdev_init_gpio_in(&dev->qdev, mv88w8618_pic_set_irq, 32);

    qdev_init_gpio_in(DEVICE(dev), mv88w8618_pic_set_irq, 32);

    sysbus_init_irq(dev, &s->parent_irq);

    memory_region_init_io(&s->iomem, OBJECT(s), &mv88w8618_pic_ops, s,

                          "musicpal-pic", MP_PIC_SIZE);
@@ -769,7 +790,7 @@ static void mv88w8618_pic_class_init(ObjectClass *klass, void *data) 
}



static const TypeInfo mv88w8618_pic_info = {

    .name          = "mv88w8618_pic",

    .name          = TYPE_MV88W8618_PIC,

    .parent        = TYPE_SYS_BUS_DEVICE,

    .instance_size = sizeof(mv88w8618_pic_state),

    .class_init    = mv88w8618_pic_class_init,
@@ -795,8 +816,15 @@ typedef struct mv88w8618_timer_state { 
    qemu_irq irq;

} mv88w8618_timer_state;



#define TYPE_MV88W8618_PIT "mv88w8618_pit"

#define MV88W8618_PIT(obj) \

    OBJECT_CHECK(mv88w8618_pit_state, (obj), TYPE_MV88W8618_PIT)



typedef struct mv88w8618_pit_state {

    SysBusDevice busdev;

    /*< private >*/

    SysBusDevice parent_obj;

    /*< public >*/



    MemoryRegion iomem;

    mv88w8618_timer_state timer[4];

} mv88w8618_pit_state;
@@ -878,8 +906,7 @@ static void mv88w8618_pit_write(void *opaque, hwaddr offset, 


static void mv88w8618_pit_reset(DeviceState *d)

{

    mv88w8618_pit_state *s = FROM_SYSBUS(mv88w8618_pit_state,

                                         SYS_BUS_DEVICE(d));

    mv88w8618_pit_state *s = MV88W8618_PIT(d);

    int i;



    for (i = 0; i < 4; i++) {
@@ -896,7 +923,7 @@ static const MemoryRegionOps mv88w8618_pit_ops = { 


static int mv88w8618_pit_init(SysBusDevice *dev)

{

    mv88w8618_pit_state *s = FROM_SYSBUS(mv88w8618_pit_state, dev);

    mv88w8618_pit_state *s = MV88W8618_PIT(dev);

    int i;



    /* Letting them all run at 1 MHz is likely just a pragmatic
@@ -946,7 +973,7 @@ static void mv88w8618_pit_class_init(ObjectClass *klass, void *data) 
}



static const TypeInfo mv88w8618_pit_info = {

    .name          = "mv88w8618_pit",

    .name          = TYPE_MV88W8618_PIT,

    .parent        = TYPE_SYS_BUS_DEVICE,

    .instance_size = sizeof(mv88w8618_pit_state),

    .class_init    = mv88w8618_pit_class_init,
@@ -955,8 +982,15 @@ static const TypeInfo mv88w8618_pit_info = { 
/* Flash config register offsets */

#define MP_FLASHCFG_CFGR0    0x04



#define TYPE_MV88W8618_FLASHCFG "mv88w8618_flashcfg"

#define MV88W8618_FLASHCFG(obj) \

    OBJECT_CHECK(mv88w8618_flashcfg_state, (obj), TYPE_MV88W8618_FLASHCFG)



typedef struct mv88w8618_flashcfg_state {

    SysBusDevice busdev;

    /*< private >*/

    SysBusDevice parent_obj;

    /*< public >*/



    MemoryRegion iomem;

    uint32_t cfgr0;

} mv88w8618_flashcfg_state;
@@ -996,7 +1030,7 @@ static const MemoryRegionOps mv88w8618_flashcfg_ops = { 


static int mv88w8618_flashcfg_init(SysBusDevice *dev)

{

    mv88w8618_flashcfg_state *s = FROM_SYSBUS(mv88w8618_flashcfg_state, dev);

    mv88w8618_flashcfg_state *s = MV88W8618_FLASHCFG(dev);



    s->cfgr0 = 0xfffe4285; /* Default as set by U-Boot for 8 MB flash */

    memory_region_init_io(&s->iomem, OBJECT(s), &mv88w8618_flashcfg_ops, s,
@@ -1026,7 +1060,7 @@ static void mv88w8618_flashcfg_class_init(ObjectClass *klass, void *data) 
}



static const TypeInfo mv88w8618_flashcfg_info = {

    .name          = "mv88w8618_flashcfg",

    .name          = TYPE_MV88W8618_FLASHCFG,

    .parent        = TYPE_SYS_BUS_DEVICE,

    .instance_size = sizeof(mv88w8618_flashcfg_state),

    .class_init    = mv88w8618_flashcfg_class_init,
@@ -1149,8 +1183,15 @@ static int mv88w8618_wlan_init(SysBusDevice *dev) 
/* LCD brightness bits in GPIO_OE_HI */

#define MP_OE_LCD_BRIGHTNESS    0x0007



#define TYPE_MUSICPAL_GPIO "musicpal_gpio"

#define MUSICPAL_GPIO(obj) \

    OBJECT_CHECK(musicpal_gpio_state, (obj), TYPE_MUSICPAL_GPIO)



typedef struct musicpal_gpio_state {

    SysBusDevice busdev;

    /*< private >*/

    SysBusDevice parent_obj;

    /*< public >*/



    MemoryRegion iomem;

    uint32_t lcd_brightness;

    uint32_t out_state;
@@ -1310,8 +1351,7 @@ static const MemoryRegionOps musicpal_gpio_ops = { 


static void musicpal_gpio_reset(DeviceState *d)

{

    musicpal_gpio_state *s = FROM_SYSBUS(musicpal_gpio_state,

                                         SYS_BUS_DEVICE(d));

    musicpal_gpio_state *s = MUSICPAL_GPIO(d);



    s->lcd_brightness = 0;

    s->out_state = 0;
@@ -1321,19 +1361,20 @@ static void musicpal_gpio_reset(DeviceState *d) 
    s->isr = 0;

}



static int musicpal_gpio_init(SysBusDevice *dev)

static int musicpal_gpio_init(SysBusDevice *sbd)

{

    musicpal_gpio_state *s = FROM_SYSBUS(musicpal_gpio_state, dev);

    DeviceState *dev = DEVICE(sbd);

    musicpal_gpio_state *s = MUSICPAL_GPIO(dev);



    sysbus_init_irq(dev, &s->irq);

    sysbus_init_irq(sbd, &s->irq);



    memory_region_init_io(&s->iomem, OBJECT(s), &musicpal_gpio_ops, s,

                          "musicpal-gpio", MP_GPIO_SIZE);

    sysbus_init_mmio(dev, &s->iomem);

    sysbus_init_mmio(sbd, &s->iomem);



    qdev_init_gpio_out(&dev->qdev, s->out, ARRAY_SIZE(s->out));

    qdev_init_gpio_out(dev, s->out, ARRAY_SIZE(s->out));



    qdev_init_gpio_in(&dev->qdev, musicpal_gpio_pin_event, 32);

    qdev_init_gpio_in(dev, musicpal_gpio_pin_event, 32);



    return 0;

}
@@ -1365,7 +1406,7 @@ static void musicpal_gpio_class_init(ObjectClass *klass, void *data) 
}



static const TypeInfo musicpal_gpio_info = {

    .name          = "musicpal_gpio",

    .name          = TYPE_MUSICPAL_GPIO,

    .parent        = TYPE_SYS_BUS_DEVICE,

    .instance_size = sizeof(musicpal_gpio_state),

    .class_init    = musicpal_gpio_class_init,
@@ -1395,8 +1436,15 @@ static const TypeInfo musicpal_gpio_info = { 
#define MP_KEY_BTN_VOLUME      (1 << 6)

#define MP_KEY_BTN_NAVIGATION  (1 << 7)



#define TYPE_MUSICPAL_KEY "musicpal_key"

#define MUSICPAL_KEY(obj) \

    OBJECT_CHECK(musicpal_key_state, (obj), TYPE_MUSICPAL_KEY)



typedef struct musicpal_key_state {

    SysBusDevice busdev;

    /*< private >*/

    SysBusDevice parent_obj;

    /*< public >*/



    MemoryRegion iomem;

    uint32_t kbd_extended;

    uint32_t pressed_keys;
@@ -1480,17 +1528,18 @@ static void musicpal_key_event(void *opaque, int keycode) 
    s->kbd_extended = 0;

}



static int musicpal_key_init(SysBusDevice *dev)

static int musicpal_key_init(SysBusDevice *sbd)

{

    musicpal_key_state *s = FROM_SYSBUS(musicpal_key_state, dev);

    DeviceState *dev = DEVICE(sbd);

    musicpal_key_state *s = MUSICPAL_KEY(dev);



    memory_region_init(&s->iomem, OBJECT(s), "dummy", 0);

    sysbus_init_mmio(dev, &s->iomem);

    sysbus_init_mmio(sbd, &s->iomem);



    s->kbd_extended = 0;

    s->pressed_keys = 0;



    qdev_init_gpio_out(&dev->qdev, s->out, ARRAY_SIZE(s->out));

    qdev_init_gpio_out(dev, s->out, ARRAY_SIZE(s->out));



    qemu_add_kbd_event_handler(musicpal_key_event, s);
@@ -1519,7 +1568,7 @@ static void musicpal_key_class_init(ObjectClass *klass, void *data) 
}



static const TypeInfo musicpal_key_info = {

    .name          = "musicpal_key",

    .name          = TYPE_MUSICPAL_KEY,

    .parent        = TYPE_SYS_BUS_DEVICE,

    .instance_size = sizeof(musicpal_key_state),

    .class_init    = musicpal_key_class_init,
@@ -1572,12 +1621,12 @@ static void musicpal_init(QEMUMachineInitArgs *args) 
    vmstate_register_ram_global(sram);

    memory_region_add_subregion(address_space_mem, MP_SRAM_BASE, sram);



    dev = sysbus_create_simple("mv88w8618_pic", MP_PIC_BASE,

    dev = sysbus_create_simple(TYPE_MV88W8618_PIC, MP_PIC_BASE,

                               cpu_pic[ARM_PIC_CPU_IRQ]);

    for (i = 0; i < 32; i++) {

        pic[i] = qdev_get_gpio_in(dev, i);

    }

    sysbus_create_varargs("mv88w8618_pit", MP_PIT_BASE, pic[MP_TIMER1_IRQ],

    sysbus_create_varargs(TYPE_MV88W8618_PIT, MP_PIT_BASE, pic[MP_TIMER1_IRQ],

                          pic[MP_TIMER2_IRQ], pic[MP_TIMER3_IRQ],

                          pic[MP_TIMER4_IRQ], NULL);
@@ -1624,10 +1673,10 @@ static void musicpal_init(QEMUMachineInitArgs *args) 
#endif



    }

    sysbus_create_simple("mv88w8618_flashcfg", MP_FLASHCFG_BASE, NULL);

    sysbus_create_simple(TYPE_MV88W8618_FLASHCFG, MP_FLASHCFG_BASE, NULL);



    qemu_check_nic_model(&nd_table[0], "mv88w8618");

    dev = qdev_create(NULL, "mv88w8618_eth");

    dev = qdev_create(NULL, TYPE_MV88W8618_ETH);

    qdev_set_nic_properties(dev, &nd_table[0]);

    qdev_init_nofail(dev);

    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, MP_ETH_BASE);
@@ -1637,12 +1686,13 @@ static void musicpal_init(QEMUMachineInitArgs *args) 


    sysbus_create_simple(TYPE_MUSICPAL_MISC, MP_MISC_BASE, NULL);



    dev = sysbus_create_simple("musicpal_gpio", MP_GPIO_BASE, pic[MP_GPIO_IRQ]);

    dev = sysbus_create_simple(TYPE_MUSICPAL_GPIO, MP_GPIO_BASE,

                               pic[MP_GPIO_IRQ]);

    i2c_dev = sysbus_create_simple("gpio_i2c", -1, NULL);

    i2c = (i2c_bus *)qdev_get_child_bus(i2c_dev, "i2c");



    lcd_dev = sysbus_create_simple("musicpal_lcd", MP_LCD_BASE, NULL);

    key_dev = sysbus_create_simple("musicpal_key", -1, NULL);

    lcd_dev = sysbus_create_simple(TYPE_MUSICPAL_LCD, MP_LCD_BASE, NULL);

    key_dev = sysbus_create_simple(TYPE_MUSICPAL_KEY, -1, NULL);



    /* I2C read data */

    qdev_connect_gpio_out(i2c_dev, 0,