Commit 699eae17 authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-misc-20150120' into staging 



Miscellaneous cross-tree patches:
 * load/store helper cleanup
 * drop TARGET_HAS_ICE define and checks
 * scripts/qapi-types.py: Add dummy member to empty structs
 * cpu_ldst.h: Don't define helpers if MMU_MODE*_SUFFIX not defined

# gpg: Signature made Tue 20 Jan 2015 15:43:38 GMT using RSA key ID 14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"

* remotes/pmaydell/tags/pull-misc-20150120:
  cpu_ldst.h: Don't define helpers if MMU_MODE*_SUFFIX not defined
  cpu_ldst.h, cpu-all.h, bswap.h: Update documentation on ld/st accessors
  cpu_ldst_template.h: Drop unused cpu_ldfq/stfq/ldfl/stfl accessors
  cpu_ldst.h: Drop unused _raw macros, saddr() and laddr()
  cpu_ldst_template.h: Use ld*_p directly rather than via ld*_raw macros
  cpu_ldst.h: Use inline functions for usermode cpu_ld/st accessors
  cpu_ldst.h: Remove unused very short ld*/st* defines
  cpu_ldst.h: Drop unused ld/st*_kernel defines
  target-mips: Don't use _raw load/store accessors
  linux-user/main.c (m68k): Use get_user_u16 rather than lduw in cpu_loop
  linux-user/vm86.c: Use cpu_ldl_data &c rather than plain ldl &c
  bsd-user/elfload.c: Don't use ldl() or ldq_raw()
  linux-user/elfload.c: Don't use _raw accessor functions
  target-sparc: Don't use {ld, st}*_raw functions
  monitor.c: Use ld*_p() instead of ld*_raw()
  cpu_ldst.h: Remove unused ldul_ macros
  exec.c: Drop TARGET_HAS_ICE define and checks
  scripts/qapi-types.py: Add dummy member to empty structs

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents a5bd4470 de5ee4a8

bsd-user/elfload.c

+7 −4
Original line number Diff line number Diff line
@@ -351,8 +351,10 @@ static inline void init_thread(struct target_pt_regs *_regs, struct image_info * 


    _regs->gpr[1] = infop->start_stack;

#if defined(TARGET_PPC64) && !defined(TARGET_ABI32)

    entry = ldq_raw(infop->entry) + infop->load_addr;

    toc = ldq_raw(infop->entry + 8) + infop->load_addr;

    get_user_u64(entry, infop->entry);

    entry += infop->load_addr;

    get_user_u64(toc, infop->entry + 8);

    toc += infop->load_addr;

    _regs->gpr[2] = toc;

    infop->entry = entry;

#endif
@@ -365,8 +367,9 @@ static inline void init_thread(struct target_pt_regs *_regs, struct image_info * 
    get_user_ual(_regs->gpr[3], pos);

    pos += sizeof(abi_ulong);

    _regs->gpr[4] = pos;

    for (tmp = 1; tmp != 0; pos += sizeof(abi_ulong))

        tmp = ldl(pos);

    for (tmp = 1; tmp != 0; pos += sizeof(abi_ulong)) {

        get_user_ual(tmp, pos);

    }

    _regs->gpr[5] = pos;

}

exec.c

+0 −16
Original line number Diff line number Diff line
@@ -553,7 +553,6 @@ void cpu_exec_init(CPUArchState *env) 
    }

}



#if defined(TARGET_HAS_ICE)

#if defined(CONFIG_USER_ONLY)

static void breakpoint_invalidate(CPUState *cpu, target_ulong pc)

{
@@ -569,7 +568,6 @@ static void breakpoint_invalidate(CPUState *cpu, target_ulong pc) 
    }

}

#endif

#endif /* TARGET_HAS_ICE */



#if defined(CONFIG_USER_ONLY)

void cpu_watchpoint_remove_all(CPUState *cpu, int mask)
@@ -689,7 +687,6 @@ static inline bool cpu_watchpoint_address_matches(CPUWatchpoint *wp, 
int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags,

                          CPUBreakpoint **breakpoint)

{

#if defined(TARGET_HAS_ICE)

    CPUBreakpoint *bp;



    bp = g_malloc(sizeof(*bp));
@@ -710,15 +707,11 @@ int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags, 
        *breakpoint = bp;

    }

    return 0;

#else

    return -ENOSYS;

#endif

}



/* Remove a specific breakpoint.  */

int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags)

{

#if defined(TARGET_HAS_ICE)

    CPUBreakpoint *bp;



    QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) {
@@ -728,27 +721,21 @@ int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags) 
        }

    }

    return -ENOENT;

#else

    return -ENOSYS;

#endif

}



/* Remove a specific breakpoint by reference.  */

void cpu_breakpoint_remove_by_ref(CPUState *cpu, CPUBreakpoint *breakpoint)

{

#if defined(TARGET_HAS_ICE)

    QTAILQ_REMOVE(&cpu->breakpoints, breakpoint, entry);



    breakpoint_invalidate(cpu, breakpoint->pc);



    g_free(breakpoint);

#endif

}



/* Remove all matching breakpoints. */

void cpu_breakpoint_remove_all(CPUState *cpu, int mask)

{

#if defined(TARGET_HAS_ICE)

    CPUBreakpoint *bp, *next;



    QTAILQ_FOREACH_SAFE(bp, &cpu->breakpoints, entry, next) {
@@ -756,14 +743,12 @@ void cpu_breakpoint_remove_all(CPUState *cpu, int mask) 
            cpu_breakpoint_remove_by_ref(cpu, bp);

        }

    }

#endif

}



/* enable or disable single step mode. EXCP_DEBUG is returned by the

   CPU loop after each instruction */

void cpu_single_step(CPUState *cpu, int enabled)

{

#if defined(TARGET_HAS_ICE)

    if (cpu->singlestep_enabled != enabled) {

        cpu->singlestep_enabled = enabled;

        if (kvm_enabled()) {
@@ -775,7 +760,6 @@ void cpu_single_step(CPUState *cpu, int enabled) 
            tb_flush(env);

        }

    }

#endif

}



void cpu_abort(CPUState *cpu, const char *fmt, ...)

include/exec/cpu-all.h

+2 −36
Original line number Diff line number Diff line
@@ -115,43 +115,9 @@ static inline void tswap64s(uint64_t *s) 
#define bswaptls(s) bswap64s(s)

#endif



/* CPU memory access without any memory or io remapping */



/*

 * the generic syntax for the memory accesses is:

 *

 * load: ld{type}{sign}{size}{endian}_{access_type}(ptr)

 *

 * store: st{type}{size}{endian}_{access_type}(ptr, val)

 *

 * type is:

 * (empty): integer access

 *   f    : float access

 *

 * sign is:

 * (empty): for floats or 32 bit size

 *   u    : unsigned

 *   s    : signed

 *

 * size is:

 *   b: 8 bits

 *   w: 16 bits

 *   l: 32 bits

 *   q: 64 bits

 *

 * endian is:

 * (empty): target cpu endianness or 8 bit access

 *   r    : reversed target cpu endianness (not implemented yet)

 *   be   : big endian (not implemented yet)

 *   le   : little endian (not implemented yet)

 *

 * access_type is:

 *   raw    : host memory access

 *   user   : user mode access using soft MMU

 *   kernel : kernel mode access using soft MMU

/* Target-endianness CPU memory access functions. These fit into the

 * {ld,st}{type}{sign}{size}{endian}_p naming scheme described in bswap.h.

 */



/* target-endianness CPU memory access functions */

#if defined(TARGET_WORDS_BIGENDIAN)

#define lduw_p(p) lduw_be_p(p)

#define ldsw_p(p) ldsw_be_p(p)

include/exec/cpu_ldst.h

+58 −116
Original line number Diff line number Diff line
@@ -23,7 +23,26 @@ 
 *

 * Used by target op helpers.

 *

 * MMU mode suffixes are defined in target cpu.h.

 * The syntax for the accessors is:

 *

 * load: cpu_ld{sign}{size}_{mmusuffix}(env, ptr)

 *

 * store: cpu_st{sign}{size}_{mmusuffix}(env, ptr, val)

 *

 * sign is:

 * (empty): for 32 and 64 bit sizes

 *   u    : unsigned

 *   s    : signed

 *

 * size is:

 *   b: 8 bits

 *   w: 16 bits

 *   l: 32 bits

 *   q: 64 bits

 *

 * mmusuffix is one of the generic suffixes "data" or "code", or

 * (for softmmu configs)  a target-specific MMU mode suffix as defined

 * in target cpu.h.

 */

#ifndef CPU_LDST_H

#define CPU_LDST_H
@@ -53,112 +72,43 @@ 
    h2g_nocheck(x); \

})



#define saddr(x) g2h(x)

#define laddr(x) g2h(x)



#else /* !CONFIG_USER_ONLY */

/* NOTE: we use double casts if pointers and target_ulong have

   different sizes */

#define saddr(x) (uint8_t *)(intptr_t)(x)

#define laddr(x) (uint8_t *)(intptr_t)(x)

#endif



#define ldub_raw(p) ldub_p(laddr((p)))

#define ldsb_raw(p) ldsb_p(laddr((p)))

#define lduw_raw(p) lduw_p(laddr((p)))

#define ldsw_raw(p) ldsw_p(laddr((p)))

#define ldl_raw(p) ldl_p(laddr((p)))

#define ldq_raw(p) ldq_p(laddr((p)))

#define ldfl_raw(p) ldfl_p(laddr((p)))

#define ldfq_raw(p) ldfq_p(laddr((p)))

#define stb_raw(p, v) stb_p(saddr((p)), v)

#define stw_raw(p, v) stw_p(saddr((p)), v)

#define stl_raw(p, v) stl_p(saddr((p)), v)

#define stq_raw(p, v) stq_p(saddr((p)), v)

#define stfl_raw(p, v) stfl_p(saddr((p)), v)

#define stfq_raw(p, v) stfq_p(saddr((p)), v)

#if defined(CONFIG_USER_ONLY)



/* In user-only mode we provide only the _code and _data accessors. */



#if defined(CONFIG_USER_ONLY)

#define MEMSUFFIX _data

#define DATA_SIZE 1

#include "exec/cpu_ldst_useronly_template.h"



/* if user mode, no other memory access functions */

#define ldub(p) ldub_raw(p)

#define ldsb(p) ldsb_raw(p)

#define lduw(p) lduw_raw(p)

#define ldsw(p) ldsw_raw(p)

#define ldl(p) ldl_raw(p)

#define ldq(p) ldq_raw(p)

#define ldfl(p) ldfl_raw(p)

#define ldfq(p) ldfq_raw(p)

#define stb(p, v) stb_raw(p, v)

#define stw(p, v) stw_raw(p, v)

#define stl(p, v) stl_raw(p, v)

#define stq(p, v) stq_raw(p, v)

#define stfl(p, v) stfl_raw(p, v)

#define stfq(p, v) stfq_raw(p, v)



#define cpu_ldub_code(env1, p) ldub_raw(p)

#define cpu_ldsb_code(env1, p) ldsb_raw(p)

#define cpu_lduw_code(env1, p) lduw_raw(p)

#define cpu_ldsw_code(env1, p) ldsw_raw(p)

#define cpu_ldl_code(env1, p) ldl_raw(p)

#define cpu_ldq_code(env1, p) ldq_raw(p)



#define cpu_ldub_data(env, addr) ldub_raw(addr)

#define cpu_lduw_data(env, addr) lduw_raw(addr)

#define cpu_ldsw_data(env, addr) ldsw_raw(addr)

#define cpu_ldl_data(env, addr) ldl_raw(addr)

#define cpu_ldq_data(env, addr) ldq_raw(addr)



#define cpu_stb_data(env, addr, data) stb_raw(addr, data)

#define cpu_stw_data(env, addr, data) stw_raw(addr, data)

#define cpu_stl_data(env, addr, data) stl_raw(addr, data)

#define cpu_stq_data(env, addr, data) stq_raw(addr, data)



#define cpu_ldub_kernel(env, addr) ldub_raw(addr)

#define cpu_lduw_kernel(env, addr) lduw_raw(addr)

#define cpu_ldsw_kernel(env, addr) ldsw_raw(addr)

#define cpu_ldl_kernel(env, addr) ldl_raw(addr)

#define cpu_ldq_kernel(env, addr) ldq_raw(addr)



#define cpu_stb_kernel(env, addr, data) stb_raw(addr, data)

#define cpu_stw_kernel(env, addr, data) stw_raw(addr, data)

#define cpu_stl_kernel(env, addr, data) stl_raw(addr, data)

#define cpu_stq_kernel(env, addr, data) stq_raw(addr, data)



#define ldub_kernel(p) ldub_raw(p)

#define ldsb_kernel(p) ldsb_raw(p)

#define lduw_kernel(p) lduw_raw(p)

#define ldsw_kernel(p) ldsw_raw(p)

#define ldl_kernel(p) ldl_raw(p)

#define ldq_kernel(p) ldq_raw(p)

#define ldfl_kernel(p) ldfl_raw(p)

#define ldfq_kernel(p) ldfq_raw(p)

#define stb_kernel(p, v) stb_raw(p, v)

#define stw_kernel(p, v) stw_raw(p, v)

#define stl_kernel(p, v) stl_raw(p, v)

#define stq_kernel(p, v) stq_raw(p, v)

#define stfl_kernel(p, v) stfl_raw(p, v)

#define stfq_kernel(p, vt) stfq_raw(p, v)



#define cpu_ldub_data(env, addr) ldub_raw(addr)

#define cpu_lduw_data(env, addr) lduw_raw(addr)

#define cpu_ldl_data(env, addr) ldl_raw(addr)



#define cpu_stb_data(env, addr, data) stb_raw(addr, data)

#define cpu_stw_data(env, addr, data) stw_raw(addr, data)

#define cpu_stl_data(env, addr, data) stl_raw(addr, data)

#define DATA_SIZE 2

#include "exec/cpu_ldst_useronly_template.h"



#else

#define DATA_SIZE 4

#include "exec/cpu_ldst_useronly_template.h"



/* XXX: find something cleaner.

 * Furthermore, this is false for 64 bits targets

 */

#define ldul_user       ldl_user

#define ldul_kernel     ldl_kernel

#define ldul_hypv       ldl_hypv

#define ldul_executive  ldl_executive

#define ldul_supervisor ldl_supervisor

#define DATA_SIZE 8

#include "exec/cpu_ldst_useronly_template.h"

#undef MEMSUFFIX



#define MEMSUFFIX _code

#define CODE_ACCESS

#define DATA_SIZE 1

#include "exec/cpu_ldst_useronly_template.h"



#define DATA_SIZE 2

#include "exec/cpu_ldst_useronly_template.h"



#define DATA_SIZE 4

#include "exec/cpu_ldst_useronly_template.h"



#define DATA_SIZE 8

#include "exec/cpu_ldst_useronly_template.h"

#undef MEMSUFFIX

#undef CODE_ACCESS



#else



/* The memory helpers for tcg-generated code need tcg_target_long etc.  */

#include "tcg.h"
@@ -182,6 +132,7 @@ uint16_t helper_ldw_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx); 
uint32_t helper_ldl_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx);

uint64_t helper_ldq_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx);



#ifdef MMU_MODE0_SUFFIX

#define CPU_MMU_INDEX 0

#define MEMSUFFIX MMU_MODE0_SUFFIX

#define DATA_SIZE 1
@@ -197,7 +148,9 @@ uint64_t helper_ldq_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx); 
#include "exec/cpu_ldst_template.h"

#undef CPU_MMU_INDEX

#undef MEMSUFFIX

#endif



#if (NB_MMU_MODES >= 2) && defined(MMU_MODE1_SUFFIX)

#define CPU_MMU_INDEX 1

#define MEMSUFFIX MMU_MODE1_SUFFIX

#define DATA_SIZE 1
@@ -213,8 +166,9 @@ uint64_t helper_ldq_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx); 
#include "exec/cpu_ldst_template.h"

#undef CPU_MMU_INDEX

#undef MEMSUFFIX

#endif



#if (NB_MMU_MODES >= 3)

#if (NB_MMU_MODES >= 3) && defined(MMU_MODE2_SUFFIX)



#define CPU_MMU_INDEX 2

#define MEMSUFFIX MMU_MODE2_SUFFIX
@@ -233,7 +187,7 @@ uint64_t helper_ldq_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx); 
#undef MEMSUFFIX

#endif /* (NB_MMU_MODES >= 3) */



#if (NB_MMU_MODES >= 4)

#if (NB_MMU_MODES >= 4) && defined(MMU_MODE3_SUFFIX)



#define CPU_MMU_INDEX 3

#define MEMSUFFIX MMU_MODE3_SUFFIX
@@ -252,7 +206,7 @@ uint64_t helper_ldq_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx); 
#undef MEMSUFFIX

#endif /* (NB_MMU_MODES >= 4) */



#if (NB_MMU_MODES >= 5)

#if (NB_MMU_MODES >= 5) && defined(MMU_MODE4_SUFFIX)



#define CPU_MMU_INDEX 4

#define MEMSUFFIX MMU_MODE4_SUFFIX
@@ -271,7 +225,7 @@ uint64_t helper_ldq_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx); 
#undef MEMSUFFIX

#endif /* (NB_MMU_MODES >= 5) */



#if (NB_MMU_MODES >= 6)

#if (NB_MMU_MODES >= 6) && defined(MMU_MODE5_SUFFIX)



#define CPU_MMU_INDEX 5

#define MEMSUFFIX MMU_MODE5_SUFFIX
@@ -311,18 +265,6 @@ uint64_t helper_ldq_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx); 
#undef CPU_MMU_INDEX

#undef MEMSUFFIX



#define ldub(p) ldub_data(p)

#define ldsb(p) ldsb_data(p)

#define lduw(p) lduw_data(p)

#define ldsw(p) ldsw_data(p)

#define ldl(p) ldl_data(p)

#define ldq(p) ldq_data(p)



#define stb(p, v) stb_data(p, v)

#define stw(p, v) stw_data(p, v)

#define stl(p, v) stl_data(p, v)

#define stq(p, v) stq_data(p, v)



#define CPU_MMU_INDEX (cpu_mmu_index(env))

#define MEMSUFFIX _code

#define SOFTMMU_CODE_ACCESS

include/exec/cpu_ldst_template.h

+4 −56
Original line number Diff line number Diff line
@@ -4,9 +4,7 @@ 
 * Generate inline load/store functions for one MMU mode and data

 * size.

 *

 * Generate a store function as well as signed and unsigned loads. For

 * 32 and 64 bit cases, also generate floating point functions with

 * the same size.

 * Generate a store function as well as signed and unsigned loads.

 *

 * Not used directly but included from cpu_ldst.h.

 *
@@ -79,7 +77,7 @@ glue(glue(cpu_ld, USUFFIX), MEMSUFFIX)(CPUArchState *env, target_ulong ptr) 
        res = glue(glue(helper_ld, SUFFIX), MMUSUFFIX)(env, addr, mmu_idx);

    } else {

        uintptr_t hostaddr = addr + env->tlb_table[mmu_idx][page_index].addend;

        res = glue(glue(ld, USUFFIX), _raw)(hostaddr);

        res = glue(glue(ld, USUFFIX), _p)((uint8_t *)hostaddr);

    }

    return res;

}
@@ -101,7 +99,7 @@ glue(glue(cpu_lds, SUFFIX), MEMSUFFIX)(CPUArchState *env, target_ulong ptr) 
                               MMUSUFFIX)(env, addr, mmu_idx);

    } else {

        uintptr_t hostaddr = addr + env->tlb_table[mmu_idx][page_index].addend;

        res = glue(glue(lds, SUFFIX), _raw)(hostaddr);

        res = glue(glue(lds, SUFFIX), _p)((uint8_t *)hostaddr);

    }

    return res;

}
@@ -127,60 +125,10 @@ glue(glue(cpu_st, SUFFIX), MEMSUFFIX)(CPUArchState *env, target_ulong ptr, 
        glue(glue(helper_st, SUFFIX), MMUSUFFIX)(env, addr, v, mmu_idx);

    } else {

        uintptr_t hostaddr = addr + env->tlb_table[mmu_idx][page_index].addend;

        glue(glue(st, SUFFIX), _raw)(hostaddr, v);

        glue(glue(st, SUFFIX), _p)((uint8_t *)hostaddr, v);

    }

}







#if DATA_SIZE == 8

static inline float64 glue(cpu_ldfq, MEMSUFFIX)(CPUArchState *env,

                                                target_ulong ptr)

{

    union {

        float64 d;

        uint64_t i;

    } u;

    u.i = glue(cpu_ldq, MEMSUFFIX)(env, ptr);

    return u.d;

}



static inline void glue(cpu_stfq, MEMSUFFIX)(CPUArchState *env,

                                             target_ulong ptr, float64 v)

{

    union {

        float64 d;

        uint64_t i;

    } u;

    u.d = v;

    glue(cpu_stq, MEMSUFFIX)(env, ptr, u.i);

}

#endif /* DATA_SIZE == 8 */



#if DATA_SIZE == 4

static inline float32 glue(cpu_ldfl, MEMSUFFIX)(CPUArchState *env,

                                                target_ulong ptr)

{

    union {

        float32 f;

        uint32_t i;

    } u;

    u.i = glue(cpu_ldl, MEMSUFFIX)(env, ptr);

    return u.f;

}



static inline void glue(cpu_stfl, MEMSUFFIX)(CPUArchState *env,

                                             target_ulong ptr, float32 v)

{

    union {

        float32 f;

        uint32_t i;

    } u;

    u.f = v;

    glue(cpu_stl, MEMSUFFIX)(env, ptr, u.i);

}

#endif /* DATA_SIZE == 4 */



#endif /* !SOFTMMU_CODE_ACCESS */



#undef RES_TYPE