Commit 6925f12f authored by Suraj Jitindar Singh's avatar Suraj Jitindar Singh Committed by David Gibson
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target/ppc/mmu_hash64: Fix incorrect shift value in amr calculation 



We are calculating the authority mask register key value wrong.

The pte entry contains the key value with the two upper bits and the three
lower bits stored separately. We should use these two portions to get a 5
bit value, not or them together which will only give us a 3 bit value.

Fix this.

Signed-off-by: default avatarSuraj Jitindar Singh <sjitindarsingh@gmail.com>
Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
parent 76134d48

target/ppc/mmu-hash64.h

+1 −1
Original line number Diff line number Diff line
@@ -85,7 +85,7 @@ void ppc_hash64_update_rmls(CPUPPCState *env); 
#define HPTE64_R_C              0x0000000000000080ULL

#define HPTE64_R_R              0x0000000000000100ULL

#define HPTE64_R_KEY_LO         0x0000000000000e00ULL

#define HPTE64_R_KEY(x)         ((((x) & HPTE64_R_KEY_HI) >> 60) | \

#define HPTE64_R_KEY(x)         ((((x) & HPTE64_R_KEY_HI) >> 57) | \

                                 (((x) & HPTE64_R_KEY_LO) >> 9))



#define HPTE64_V_1TB_SEG        0x4000000000000000ULL