Commit 65255e8e authored by Alex Bennée's avatar Alex Bennée Committed by Richard Henderson
Browse files

target/*helper: don't check retaddr before calling cpu_restore_state 



cpu_restore_state officially supports being passed an address it can't
resolve the state for. As a result the checks in the helpers are
superfluous and can be removed. This makes the code consistent with
other users of cpu_restore_state.

Of course this does nothing to address what to do if cpu_restore_state
can't resolve the state but so far it seems this is handled elsewhere.

The change was made with included coccinelle script.

Signed-off-by: default avatarAlex Bennée <alex.bennee@linaro.org>
[rth: Fixed up comment indentation.  Added second hunk to script to
combine cpu_restore_state and cpu_loop_exit.]
Signed-off-by: default avatarRichard Henderson <richard.henderson@linaro.org>
parent 281f3274

scripts/coccinelle/cpu_restore_state.cocci

0 → 100644
+19 −0
Original line number Diff line number Diff line 
// Remove unneeded tests before calling cpu_restore_state

//

// spatch --macro-file scripts/cocci-macro-file.h \

//        --sp-file ./scripts/coccinelle/cpu_restore_state.cocci \

//        --keep-comments --in-place --use-gitgrep --dir target

@@

expression A;

expression C;

@@

-if (A) {

     cpu_restore_state(C, A);

-}

@@

expression A;

expression C;

@@

- cpu_restore_state(C, A);

- cpu_loop_exit(C);

+ cpu_loop_exit_restore(C, A);

target/alpha/mem_helper.c

+3 −10
Original line number Diff line number Diff line
@@ -34,9 +34,7 @@ void alpha_cpu_do_unaligned_access(CPUState *cs, vaddr addr, 
    uint64_t pc;

    uint32_t insn;



    if (retaddr) {

    cpu_restore_state(cs, retaddr);

    }



    pc = env->pc;

    insn = cpu_ldl_code(env, pc);
@@ -58,9 +56,7 @@ void alpha_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, 
    AlphaCPU *cpu = ALPHA_CPU(cs);

    CPUAlphaState *env = &cpu->env;



    if (retaddr) {

    cpu_restore_state(cs, retaddr);

    }



    env->trap_arg0 = addr;

    env->trap_arg1 = access_type == MMU_DATA_STORE ? 1 : 0;
@@ -80,11 +76,8 @@ void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type, 


    ret = alpha_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);

    if (unlikely(ret != 0)) {

        if (retaddr) {

            cpu_restore_state(cs, retaddr);

        }

        /* Exception index and error code are already set */

        cpu_loop_exit(cs);

        cpu_loop_exit_restore(cs, retaddr);

    }

}

#endif /* CONFIG_USER_ONLY */

target/arm/op_helper.c

+6 −12
Original line number Diff line number Diff line
@@ -182,10 +182,8 @@ void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type, 
    if (unlikely(ret)) {

        ARMCPU *cpu = ARM_CPU(cs);



        if (retaddr) {

        /* now we have a real cpu fault */

        cpu_restore_state(cs, retaddr);

        }



        deliver_fault(cpu, addr, access_type, mmu_idx, &fi);

    }
@@ -199,10 +197,8 @@ void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr, 
    ARMCPU *cpu = ARM_CPU(cs);

    ARMMMUFaultInfo fi = {};



    if (retaddr) {

    /* now we have a real cpu fault */

    cpu_restore_state(cs, retaddr);

    }



    fi.type = ARMFault_Alignment;

    deliver_fault(cpu, vaddr, access_type, mmu_idx, &fi);
@@ -221,10 +217,8 @@ void arm_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, 
    ARMCPU *cpu = ARM_CPU(cs);

    ARMMMUFaultInfo fi = {};



    if (retaddr) {

    /* now we have a real cpu fault */

    cpu_restore_state(cs, retaddr);

    }



    /* The EA bit in syndromes and fault status registers is an

     * IMPDEF classification of external aborts. ARM implementations

target/i386/svm_helper.c

+1 −3
Original line number Diff line number Diff line
@@ -584,9 +584,7 @@ void cpu_vmexit(CPUX86State *env, uint32_t exit_code, uint64_t exit_info_1, 
{

    CPUState *cs = CPU(x86_env_get_cpu(env));



    if (retaddr) {

    cpu_restore_state(cs, retaddr);

    }



    qemu_log_mask(CPU_LOG_TB_IN_ASM, "vmexit(%08x, %016" PRIx64 ", %016"

                  PRIx64 ", " TARGET_FMT_lx ")!\n",

target/lm32/op_helper.c

+2 −5
Original line number Diff line number Diff line
@@ -151,11 +151,8 @@ void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type, 


    ret = lm32_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);

    if (unlikely(ret)) {

        if (retaddr) {

        /* now we have a real cpu fault */

            cpu_restore_state(cs, retaddr);

        }

        cpu_loop_exit(cs);

        cpu_loop_exit_restore(cs, retaddr);

    }

}

#endif