Commit 64e40755 authored by Richard Henderson's avatar Richard Henderson Committed by Peter Maydell
Browse files

target/arm: Split out arm_sctlr



Minimize the number of places that will need updating when
the virtual host extensions are added.

Signed-off-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Message-id: 20190301200501.16533-2-richard.henderson@linaro.org
Reviewed-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent 9d090d17
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+15 −9
Original line number Diff line number Diff line
@@ -3042,11 +3042,20 @@ static inline bool arm_sctlr_b(CPUARMState *env)
        (env->cp15.sctlr_el[1] & SCTLR_B) != 0;
}

static inline uint64_t arm_sctlr(CPUARMState *env, int el)
{
    if (el == 0) {
        /* FIXME: ARMv8.1-VHE S2 translation regime.  */
        return env->cp15.sctlr_el[1];
    } else {
        return env->cp15.sctlr_el[el];
    }
}


/* Return true if the processor is in big-endian mode. */
static inline bool arm_cpu_data_is_big_endian(CPUARMState *env)
{
    int cur_el;

    /* In 32bit endianness is determined by looking at CPSR's E bit */
    if (!is_a64(env)) {
        return
@@ -3065,15 +3074,12 @@ static inline bool arm_cpu_data_is_big_endian(CPUARMState *env)
            arm_sctlr_b(env) ||
#endif
                ((env->uncached_cpsr & CPSR_E) ? 1 : 0);
    }

    cur_el = arm_current_el(env);
    } else {
        int cur_el = arm_current_el(env);
        uint64_t sctlr = arm_sctlr(env, cur_el);

    if (cur_el == 0) {
        return (env->cp15.sctlr_el[1] & SCTLR_E0E) != 0;
        return (sctlr & (cur_el ? SCTLR_EE : SCTLR_E0E)) != 0;
    }

    return (env->cp15.sctlr_el[cur_el] & SCTLR_EE) != 0;
}

#include "exec/cpu-all.h"
+2 −6
Original line number Diff line number Diff line
@@ -12854,12 +12854,8 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc,
            flags = FIELD_DP32(flags, TBFLAG_A64, ZCR_LEN, zcr_len);
        }

        if (current_el == 0) {
            /* FIXME: ARMv8.1-VHE S2 translation regime.  */
            sctlr = env->cp15.sctlr_el[1];
        } else {
            sctlr = env->cp15.sctlr_el[current_el];
        }
        sctlr = arm_sctlr(env, current_el);

        if (cpu_isar_feature(aa64_pauth, cpu)) {
            /*
             * In order to save space in flags, we record only whether