Commit 64175afc authored by Peter Maydell's avatar Peter Maydell
Browse files

arm_gicv3: Fix ICC_BPR1 reset value when EL3 not implemented 



If EL3 is not implemented (ie only one security state) then the
one and only ICC_BPR1 register behaves like the Non-secure
ICC_BPR1 in an EL3-present configuration. In particular, its
reset value is GIC_MIN_BPR_NS, not GIC_MIN_BPR.

Correct the erroneous reset value; this fixes a problem where
we might hit the assert added in commit a89ff39e.

Reported-by: default avatarAlex Bennée <alex.bennee@linaro.org>
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Reviewed-by: default avatarAlex Bennée <alex.bennee@linaro.org>
Tested-by: default avatarAlex Bennée <alex.bennee@linaro.org>
Message-id: 1496849369-30282-1-git-send-email-peter.maydell@linaro.org
parent b55a69fe

hw/intc/arm_gicv3_cpuif.c

+1 −5
Original line number Diff line number Diff line
@@ -2039,11 +2039,7 @@ static void icc_reset(CPUARMState *env, const ARMCPRegInfo *ri) 
    cs->icc_pmr_el1 = 0;

    cs->icc_bpr[GICV3_G0] = GIC_MIN_BPR;

    cs->icc_bpr[GICV3_G1] = GIC_MIN_BPR;

    if (arm_feature(env, ARM_FEATURE_EL3)) {

    cs->icc_bpr[GICV3_G1NS] = GIC_MIN_BPR_NS;

    } else {

        cs->icc_bpr[GICV3_G1NS] = GIC_MIN_BPR;

    }

    memset(cs->icc_apr, 0, sizeof(cs->icc_apr));

    memset(cs->icc_igrpen, 0, sizeof(cs->icc_igrpen));

    cs->icc_ctlr_el3 = ICC_CTLR_EL3_NDS | ICC_CTLR_EL3_A3V |