Commit 63fc7375 authored by Paolo Bonzini's avatar Paolo Bonzini Committed by Michael Tokarev
Browse files

gt64xxx: fix decoding of ISD register 

The GT64xxx's internal registers can be placed above the first 4 GiB
in the address space, but not above the first 64 GiB.  Correctly cast
the register to a 64-bit integer, and mask away bits above bit 35.

Datasheet at http://pdf.datasheetarchive.com/datasheetsmain/Datasheets-33/DSA-655889.pdf


(bug reported by Coverity).

Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
Signed-off-by: default avatarMichael Tokarev <mjt@tls.msk.ru>
parent fccd35a0

hw/mips/gt64xxx_pci.c

+2 −1
Original line number Diff line number Diff line
@@ -275,7 +275,8 @@ static void check_reserved_space (hwaddr *start, 


static void gt64120_isd_mapping(GT64120State *s)

{

    hwaddr start = s->regs[GT_ISD] << 21;

    /* Bits 14:0 of ISD map to bits 35:21 of the start address.  */

    hwaddr start = ((hwaddr)s->regs[GT_ISD] << 21) & 0xFFFE00000ull;

    hwaddr length = 0x1000;



    if (s->ISD_length) {