Loading target-arm/cpu.c +1 −1 Original line number Diff line number Diff line Loading @@ -778,7 +778,7 @@ static void cpu_register(const ARMCPUInfo *info) .class_size = sizeof(ARMCPUClass), }; type_register_static(&type_info); type_register(&type_info); } static const TypeInfo arm_cpu_type_info = { Loading target-arm/helper.c +1 −1 Original line number Diff line number Diff line Loading @@ -1736,7 +1736,7 @@ static void do_interrupt_v7m(CPUARMState *env) armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE); return; case EXCP_SWI: env->regs[15] += 2; /* The PC already points to the next instruction. */ armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_SVC); return; case EXCP_PREFETCH_ABORT: Loading Loading
target-arm/cpu.c +1 −1 Original line number Diff line number Diff line Loading @@ -778,7 +778,7 @@ static void cpu_register(const ARMCPUInfo *info) .class_size = sizeof(ARMCPUClass), }; type_register_static(&type_info); type_register(&type_info); } static const TypeInfo arm_cpu_type_info = { Loading
target-arm/helper.c +1 −1 Original line number Diff line number Diff line Loading @@ -1736,7 +1736,7 @@ static void do_interrupt_v7m(CPUARMState *env) armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE); return; case EXCP_SWI: env->regs[15] += 2; /* The PC already points to the next instruction. */ armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_SVC); return; case EXCP_PREFETCH_ABORT: Loading