Commit 63b60551 authored by Edgar E. Iglesias's avatar Edgar E. Iglesias Committed by Peter Maydell
Browse files

target-arm: Add FAR_EL2 and 3 



Reviewed-by: default avatarGreg Bellows <greg.bellows@linaro.org>
Signed-off-by: default avatarEdgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: default avatarAlex Bennée <alex.bennee@linaro.org>
Message-id: 1402994746-8328-7-git-send-email-edgar.iglesias@gmail.com
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent f2c30f42

target-arm/cpu.h

+1 −1
Original line number Diff line number Diff line
@@ -187,7 +187,7 @@ typedef struct CPUARMState { 
        uint32_t ifsr_el2; /* Fault status registers.  */

        uint64_t esr_el[4];

        uint32_t c6_region[8]; /* MPU base/size registers.  */

        uint64_t far_el[2]; /* Fault address registers.  */

        uint64_t far_el[4]; /* Fault address registers.  */

        uint64_t par_el1;  /* Translation result. */

        uint32_t c9_insn; /* Cache lockdown registers.  */

        uint32_t c9_data;

target-arm/helper.c

+6 −0
Original line number Diff line number Diff line
@@ -2131,6 +2131,9 @@ static const ARMCPRegInfo v8_el2_cp_reginfo[] = { 
      .type = ARM_CP_NO_MIGRATE,

      .opc0 = 3, .opc1 = 4, .crn = 5, .crm = 2, .opc2 = 0,

      .access = PL2_RW, .fieldoffset = offsetof(CPUARMState, cp15.esr_el[2]) },

    { .name = "FAR_EL2", .state = ARM_CP_STATE_AA64,

      .opc0 = 3, .opc1 = 4, .crn = 6, .crm = 0, .opc2 = 0,

      .access = PL2_RW, .fieldoffset = offsetof(CPUARMState, cp15.far_el[2]) },

    { .name = "SPSR_EL2", .state = ARM_CP_STATE_AA64,

      .type = ARM_CP_NO_MIGRATE,

      .opc0 = 3, .opc1 = 4, .crn = 4, .crm = 0, .opc2 = 0,
@@ -2153,6 +2156,9 @@ static const ARMCPRegInfo v8_el3_cp_reginfo[] = { 
      .type = ARM_CP_NO_MIGRATE,

      .opc0 = 3, .opc1 = 6, .crn = 5, .crm = 2, .opc2 = 0,

      .access = PL3_RW, .fieldoffset = offsetof(CPUARMState, cp15.esr_el[3]) },

    { .name = "FAR_EL3", .state = ARM_CP_STATE_AA64,

      .opc0 = 3, .opc1 = 6, .crn = 6, .crm = 0, .opc2 = 0,

      .access = PL3_RW, .fieldoffset = offsetof(CPUARMState, cp15.far_el[3]) },

    { .name = "SPSR_EL3", .state = ARM_CP_STATE_AA64,

      .type = ARM_CP_NO_MIGRATE,

      .opc0 = 3, .opc1 = 6, .crn = 4, .crm = 0, .opc2 = 0,