Commit 6341fdcb authored by Blue Swirl's avatar Blue Swirl
Browse files

Fix CPU timer interrupts 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3876 c046a42c-6fe2-441c-8c8c-71466251a162
parent 37191109

hw/slavio_intctl.c

+7 −5
Original line number Diff line number Diff line
@@ -70,7 +70,8 @@ typedef struct SLAVIO_INTCTLState { 
#define INTCTLM_MASK 0x1f

#define MASTER_IRQ_MASK ~0x0fa2007f

#define MASTER_DISABLE 0x80000000

#define CPU_IRQ_MASK 0xfffe0000

#define CPU_SOFTIRQ_MASK 0xfffe0000

#define CPU_HARDIRQ_MASK 0x0000fffe

#define CPU_IRQ_INT15_IN 0x0004000

#define CPU_IRQ_INT15_MASK 0x80000000
@@ -111,13 +112,13 @@ static void slavio_intctl_mem_writel(void *opaque, target_phys_addr_t addr, uint 
    case 1: // clear pending softints

        if (val & CPU_IRQ_INT15_IN)

            val |= CPU_IRQ_INT15_MASK;

        val &= CPU_IRQ_MASK;

        val &= CPU_SOFTIRQ_MASK;

        s->intreg_pending[cpu] &= ~val;

        slavio_check_interrupts(s);

        DPRINTF("Cleared cpu %d irq mask %x, curmask %x\n", cpu, val, s->intreg_pending[cpu]);

        break;

    case 2: // set softint

        val &= CPU_IRQ_MASK;

        val &= CPU_SOFTIRQ_MASK;

        s->intreg_pending[cpu] |= val;

        slavio_check_interrupts(s);

        DPRINTF("Set cpu %d irq mask %x, curmask %x\n", cpu, val, s->intreg_pending[cpu]);
@@ -256,8 +257,9 @@ static void slavio_check_interrupts(void *opaque) 
                if (pending & (1 << j))

                    pil_pending |= 1 << s->intbit_to_level[j];

            }

            pil_pending |= s->intreg_pending[i] & CPU_HARDIRQ_MASK;

        }

        pil_pending |= (s->intreg_pending[i] & CPU_IRQ_MASK) >> 16;

        pil_pending |= (s->intreg_pending[i] & CPU_SOFTIRQ_MASK) >> 16;



        for (j = 0; j < MAX_PILS; j++) {

            if (pil_pending & (1 << j)) {
@@ -386,7 +388,7 @@ void *slavio_intctl_init(target_phys_addr_t addr, target_phys_addr_t addrg, 
    *irq = qemu_allocate_irqs(slavio_set_irq, s, 32);



    *cpu_irq = qemu_allocate_irqs(slavio_set_timer_irq_cpu, s, MAX_CPUS);

    s->cputimer_bit = 1 << s->intbit_to_level[cputimer];

    s->cputimer_bit = 1 << cputimer;

    slavio_intctl_reset(s);

    return s;

}

hw/slavio_timer.c

+2 −0
Original line number Diff line number Diff line
@@ -253,6 +253,8 @@ static void slavio_timer_mem_writel(void *opaque, target_phys_addr_t addr, 
                if (val & (1 << i)) {

                    qemu_irq_lower(s->slave[i]->irq);

                    s->slave[i]->limit = -1ULL;

                } else {

                    ptimer_stop(s->slave[i]->timer);

                }

                if ((val & (1 << i)) != (s->slave_mode & (1 << i))) {

                    ptimer_stop(s->slave[i]->timer);

hw/sun4m.c

+7 −6
Original line number Diff line number Diff line
@@ -88,8 +88,9 @@ struct hwdef { 
    uint32_t ecc_version;

    target_phys_addr_t sun4c_intctl_base, sun4c_counter_base;

    long vram_size, nvram_size;

    // IRQ numbers are not PIL ones, but master interrupt controller register

    // bit numbers

    // IRQ numbers are not PIL ones, but master interrupt controller

    // register bit numbers except for clock_irq, which indexes cpu

    // interrupt controller register

    int intctl_g_intr, esp_irq, le_irq, clock_irq, clock1_irq;

    int ser_irq, ms_kb_irq, fd_irq, me_irq, cs_irq;

    int machine_id; // For NVRAM
@@ -691,7 +692,7 @@ static const struct hwdef hwdefs[] = { 
        .nvram_size   = 0x2000,

        .esp_irq = 18,

        .le_irq = 16,

        .clock_irq = 7,

        .clock_irq = 14,

        .clock1_irq = 19,

        .ms_kb_irq = 14,

        .ser_irq = 15,
@@ -732,7 +733,7 @@ static const struct hwdef hwdefs[] = { 
        .nvram_size   = 0x2000,

        .esp_irq = 18,

        .le_irq = 16,

        .clock_irq = 7,

        .clock_irq = 14,

        .clock1_irq = 19,

        .ms_kb_irq = 14,

        .ser_irq = 15,
@@ -773,7 +774,7 @@ static const struct hwdef hwdefs[] = { 
        .nvram_size   = 0x2000,

        .esp_irq = 18,

        .le_irq = 16,

        .clock_irq = 7,

        .clock_irq = 14,

        .clock1_irq = 19,

        .ms_kb_irq = 14,

        .ser_irq = 15,
@@ -814,7 +815,7 @@ static const struct hwdef hwdefs[] = { 
        .nvram_size   = 0x2000,

        .esp_irq = 18,

        .le_irq = 16,

        .clock_irq = 7,

        .clock_irq = 14,

        .clock1_irq = 19,

        .ms_kb_irq = 14,

        .ser_irq = 15,