Commit 6208f094 authored by Stefan Markovic's avatar Stefan Markovic Committed by Aleksandar Markovic
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target/mips: Add bit definitions for DSP R3 ASE 



Add DSP R3 ASE related bit definition for insn_flags and hflags.

Reviewed-by: default avatarAleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: default avatarStefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: default avatarAleksandar Markovic <amarkovic@wavecomp.com>
parent 45ebdd24

target/mips/cpu.h

+1 −0
Original line number Diff line number Diff line
@@ -795,6 +795,7 @@ struct CPUMIPSState { 
    /* MIPS DSP resources access. */

#define MIPS_HFLAG_DSP   0x080000  /* Enable access to MIPS DSP resources. */

#define MIPS_HFLAG_DSPR2 0x100000  /* Enable access to MIPS DSPR2 resources. */

#define MIPS_HFLAG_DSPR3 0x20000000 /* Enable access to MIPS DSPR3 resources.*/

    /* Extra flag about HWREna register. */

#define MIPS_HFLAG_HWRENA_ULR 0x200000 /* ULR bit from HWREna is set. */

#define MIPS_HFLAG_SBRI  0x400000 /* R6 SDBBP causes RI excpt. in user mode */

target/mips/mips-defs.h

+1 −0
Original line number Diff line number Diff line
@@ -53,6 +53,7 @@ 
#define ASE_MDMX          0x0000000400000000ULL

#define ASE_DSP           0x0000000800000000ULL

#define ASE_DSPR2         0x0000001000000000ULL

#define ASE_DSPR3         0x0000002000000000ULL

#define ASE_MT            0x0000004000000000ULL

#define ASE_SMARTMIPS     0x0000008000000000ULL

#define ASE_MICROMIPS     0x0000010000000000ULL