Commit 611c749c authored by Philippe Mathieu-Daudé's avatar Philippe Mathieu-Daudé
Browse files

hw/block/pflash_cfi01: Start state machine as READY to accept commands 



When the state machine is ready to accept command, the bit 7 of
the status register (SR) is set to 1.
The guest polls the status register and check this bit before
writting command to the internal 'Write State Machine' (WSM).

Set SR.7 bit to 1 when the device is created.

There is no migration impact by this change.

Reference: Read Array Flowchart
  "Common Flash Interface (CFI) and Command Sets"
   (Intel Application Note 646)
   Appendix B "Basic Command Set"

Reviewed-by: default avatarJohn Snow <jsnow@redhat.com>
Reviewed-by: default avatarAlistair Francis <alistair.francis@wdc.com>
Regression-tested-by: default avatarLaszlo Ersek <lersek@redhat.com>
Message-Id: <20190715121338.20600-5-philmd@redhat.com>
Signed-off-by: default avatarPhilippe Mathieu-Daudé <philmd@redhat.com>
parent 2658594f

hw/block/pflash_cfi01.c

+1 −1
Original line number Diff line number Diff line
@@ -777,7 +777,7 @@ static void pflash_cfi01_realize(DeviceState *dev, Error **errp) 
    pfl->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, pflash_timer, pfl);

    pfl->wcycle = 0;

    pfl->cmd = 0;

    pfl->status = 0;

    pfl->status = 0x80; /* WSM ready */

    /* Hardcoded CFI table */

    /* Standard "QRY" string */

    pfl->cfi_table[0x10] = 'Q';