Commit 609dd53d authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20200506' into staging 



Add tcg_gen_gvec_dup_imm
Misc tcg patches

# gpg: Signature made Wed 06 May 2020 19:23:43 BST
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* remotes/rth/tags/pull-tcg-20200506:
  tcg: Fix integral argument type to tcg_gen_rot[rl]i_i{32,64}
  tcg: Add load_dest parameter to GVecGen2
  tcg: Improve vector tail clearing
  tcg: Add tcg_gen_gvec_dup_tl
  tcg: Remove tcg_gen_gvec_dup{8,16,32,64}i
  tcg: Use tcg_gen_gvec_dup_imm in logical simplifications
  target/arm: Use tcg_gen_gvec_dup_imm
  target/ppc: Use tcg_gen_gvec_dup_imm
  target/s390x: Use tcg_gen_gvec_dup_imm
  tcg: Add tcg_gen_gvec_dup_imm

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents 298d893d 07dada03

include/tcg/tcg-op-gvec.h

+9 −4
Original line number Diff line number Diff line
@@ -109,6 +109,8 @@ typedef struct { 
    uint8_t vece;

    /* Prefer i64 to v64.  */

    bool prefer_i64;

    /* Load dest as a 2nd source operand.  */

    bool load_dest;

} GVecGen2;



typedef struct {
@@ -313,15 +315,18 @@ void tcg_gen_gvec_ors(unsigned vece, uint32_t dofs, uint32_t aofs, 


void tcg_gen_gvec_dup_mem(unsigned vece, uint32_t dofs, uint32_t aofs,

                          uint32_t s, uint32_t m);

void tcg_gen_gvec_dup_imm(unsigned vece, uint32_t dofs, uint32_t s,

                          uint32_t m, uint64_t imm);

void tcg_gen_gvec_dup_i32(unsigned vece, uint32_t dofs, uint32_t s,

                          uint32_t m, TCGv_i32);

void tcg_gen_gvec_dup_i64(unsigned vece, uint32_t dofs, uint32_t s,

                          uint32_t m, TCGv_i64);



void tcg_gen_gvec_dup8i(uint32_t dofs, uint32_t s, uint32_t m, uint8_t x);

void tcg_gen_gvec_dup16i(uint32_t dofs, uint32_t s, uint32_t m, uint16_t x);

void tcg_gen_gvec_dup32i(uint32_t dofs, uint32_t s, uint32_t m, uint32_t x);

void tcg_gen_gvec_dup64i(uint32_t dofs, uint32_t s, uint32_t m, uint64_t x);

#if TARGET_LONG_BITS == 64

# define tcg_gen_gvec_dup_tl  tcg_gen_gvec_dup_i64

#else

# define tcg_gen_gvec_dup_tl  tcg_gen_gvec_dup_i32

#endif



void tcg_gen_gvec_shli(unsigned vece, uint32_t dofs, uint32_t aofs,

                       int64_t shift, uint32_t oprsz, uint32_t maxsz);

include/tcg/tcg-op.h

+4 −4
Original line number Diff line number Diff line
@@ -297,9 +297,9 @@ void tcg_gen_ctzi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2); 
void tcg_gen_clrsb_i32(TCGv_i32 ret, TCGv_i32 arg);

void tcg_gen_ctpop_i32(TCGv_i32 a1, TCGv_i32 a2);

void tcg_gen_rotl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);

void tcg_gen_rotli_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);

void tcg_gen_rotli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);

void tcg_gen_rotr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);

void tcg_gen_rotri_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);

void tcg_gen_rotri_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);

void tcg_gen_deposit_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2,

                         unsigned int ofs, unsigned int len);

void tcg_gen_deposit_z_i32(TCGv_i32 ret, TCGv_i32 arg,
@@ -493,9 +493,9 @@ void tcg_gen_ctzi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2); 
void tcg_gen_clrsb_i64(TCGv_i64 ret, TCGv_i64 arg);

void tcg_gen_ctpop_i64(TCGv_i64 a1, TCGv_i64 a2);

void tcg_gen_rotl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);

void tcg_gen_rotli_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);

void tcg_gen_rotli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);

void tcg_gen_rotr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);

void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);

void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);

void tcg_gen_deposit_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2,

                         unsigned int ofs, unsigned int len);

void tcg_gen_deposit_z_i64(TCGv_i64 ret, TCGv_i64 arg,

target/arm/translate-a64.c

+5 −5
Original line number Diff line number Diff line
@@ -502,7 +502,7 @@ static void clear_vec_high(DisasContext *s, bool is_q, int rd) 
        tcg_temp_free_i64(tcg_zero);

    }

    if (vsz > 16) {

        tcg_gen_gvec_dup8i(ofs + 16, vsz - 16, vsz - 16, 0);

        tcg_gen_gvec_dup_imm(MO_64, ofs + 16, vsz - 16, vsz - 16, 0);

    }

}
@@ -7785,7 +7785,7 @@ static void disas_simd_mod_imm(DisasContext *s, uint32_t insn) 


    if (!((cmode & 0x9) == 0x1 || (cmode & 0xd) == 0x9)) {

        /* MOVI or MVNI, with MVNI negation handled above.  */

        tcg_gen_gvec_dup64i(vec_full_reg_offset(s, rd), is_q ? 16 : 8,

        tcg_gen_gvec_dup_imm(MO_64, vec_full_reg_offset(s, rd), is_q ? 16 : 8,

                             vec_full_reg_size(s), imm);

    } else {

        /* ORR or BIC, with BIC negation to AND handled above.  */
@@ -10214,7 +10214,7 @@ static void handle_vec_simd_shri(DisasContext *s, bool is_q, bool is_u, 
        if (is_u) {

            if (shift == 8 << size) {

                /* Shift count the same size as element size produces zero.  */

                tcg_gen_gvec_dup8i(vec_full_reg_offset(s, rd),

                tcg_gen_gvec_dup_imm(size, vec_full_reg_offset(s, rd),

                                     is_q ? 16 : 8, vec_full_reg_size(s), 0);

            } else {

                gen_gvec_fn2i(s, is_q, rd, rn, shift, tcg_gen_gvec_shri, size);

target/arm/translate-sve.c

+5 −7
Original line number Diff line number Diff line
@@ -177,7 +177,7 @@ static bool do_mov_z(DisasContext *s, int rd, int rn) 
static void do_dupi_z(DisasContext *s, int rd, uint64_t word)

{

    unsigned vsz = vec_full_reg_size(s);

    tcg_gen_gvec_dup64i(vec_full_reg_offset(s, rd), vsz, vsz, word);

    tcg_gen_gvec_dup_imm(MO_64, vec_full_reg_offset(s, rd), vsz, vsz, word);

}



/* Invoke a vector expander on two Pregs.  */
@@ -1453,7 +1453,7 @@ static bool do_predset(DisasContext *s, int esz, int rd, int pat, bool setflag) 
        unsigned oprsz = size_for_gvec(setsz / 8);



        if (oprsz * 8 == setsz) {

            tcg_gen_gvec_dup64i(ofs, oprsz, maxsz, word);

            tcg_gen_gvec_dup_imm(MO_64, ofs, oprsz, maxsz, word);

            goto done;

        }

    }
@@ -2044,7 +2044,7 @@ static bool trans_DUP_x(DisasContext *s, arg_DUP_x *a) 
            unsigned nofs = vec_reg_offset(s, a->rn, index, esz);

            tcg_gen_gvec_dup_mem(esz, dofs, nofs, vsz, vsz);

        } else {

            tcg_gen_gvec_dup64i(dofs, vsz, vsz, 0);

            tcg_gen_gvec_dup_imm(esz, dofs, vsz, vsz, 0);

        }

    }

    return true;
@@ -3260,9 +3260,7 @@ static bool trans_FDUP(DisasContext *s, arg_FDUP *a) 


        /* Decode the VFP immediate.  */

        imm = vfp_expand_imm(a->esz, a->imm);

        imm = dup_const(a->esz, imm);



        tcg_gen_gvec_dup64i(dofs, vsz, vsz, imm);

        tcg_gen_gvec_dup_imm(a->esz, dofs, vsz, vsz, imm);

    }

    return true;

}
@@ -3276,7 +3274,7 @@ static bool trans_DUP_i(DisasContext *s, arg_DUP_i *a) 
        unsigned vsz = vec_full_reg_size(s);

        int dofs = vec_full_reg_offset(s, a->rd);



        tcg_gen_gvec_dup64i(dofs, vsz, vsz, dup_const(a->esz, a->imm));

        tcg_gen_gvec_dup_imm(a->esz, dofs, vsz, vsz, a->imm);

    }

    return true;

}

target/arm/translate.c

+6 −3
Original line number Diff line number Diff line
@@ -5209,7 +5209,8 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn) 
                                          MIN(shift, (8 << size) - 1),

                                          vec_size, vec_size);

                    } else if (shift >= 8 << size) {

                        tcg_gen_gvec_dup8i(rd_ofs, vec_size, vec_size, 0);

                        tcg_gen_gvec_dup_imm(MO_8, rd_ofs, vec_size,

                                             vec_size, 0);

                    } else {

                        tcg_gen_gvec_shri(size, rd_ofs, rm_ofs, shift,

                                          vec_size, vec_size);
@@ -5260,7 +5261,8 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn) 
                         * architecturally valid and results in zero.

                         */

                        if (shift >= 8 << size) {

                            tcg_gen_gvec_dup8i(rd_ofs, vec_size, vec_size, 0);

                            tcg_gen_gvec_dup_imm(size, rd_ofs,

                                                 vec_size, vec_size, 0);

                        } else {

                            tcg_gen_gvec_shli(size, rd_ofs, rm_ofs, shift,

                                              vec_size, vec_size);
@@ -5606,7 +5608,8 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn) 
                    }

                    tcg_temp_free_i64(t64);

                } else {

                    tcg_gen_gvec_dup32i(reg_ofs, vec_size, vec_size, imm);

                    tcg_gen_gvec_dup_imm(MO_32, reg_ofs, vec_size,

                                         vec_size, imm);

                }

            }

        }