Loading target/s390x/helper.h +1 −0 Original line number Diff line number Diff line Loading @@ -205,6 +205,7 @@ DEF_HELPER_FLAGS_4(gvec_verll16, TCG_CALL_NO_RWG, void, ptr, cptr, i64, i32) DEF_HELPER_FLAGS_4(gvec_verim8, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32) DEF_HELPER_FLAGS_4(gvec_verim16, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32) DEF_HELPER_FLAGS_4(gvec_vsl, TCG_CALL_NO_RWG, void, ptr, cptr, i64, i32) DEF_HELPER_FLAGS_4(gvec_vsra, TCG_CALL_NO_RWG, void, ptr, cptr, i64, i32) #ifndef CONFIG_USER_ONLY DEF_HELPER_3(servc, i32, env, i64, i64) Loading target/s390x/insn-data.def +4 −0 Original line number Diff line number Diff line Loading @@ -1166,6 +1166,10 @@ F(0xe775, VSLB, VRR_c, V, 0, 0, 0, 0, vsl, 0, IF_VEC) /* VECTOR SHIFT LEFT DOUBLE BY BYTE */ F(0xe777, VSLDB, VRI_d, V, 0, 0, 0, 0, vsldb, 0, IF_VEC) /* VECTOR SHIFT RIGHT ARITHMETIC */ F(0xe77e, VSRA, VRR_c, V, 0, 0, 0, 0, vsra, 0, IF_VEC) /* VECTOR SHIFT RIGHT ARITHMETIC BY BYTE */ F(0xe77f, VSRAB, VRR_c, V, 0, 0, 0, 0, vsra, 0, IF_VEC) #ifndef CONFIG_USER_ONLY /* COMPARE AND SWAP AND PURGE */ Loading target/s390x/translate_vx.inc.c +17 −0 Original line number Diff line number Diff line Loading @@ -2089,3 +2089,20 @@ static DisasJumpType op_vsldb(DisasContext *s, DisasOps *o) tcg_temp_free(t2); return DISAS_NEXT; } static DisasJumpType op_vsra(DisasContext *s, DisasOps *o) { TCGv_i64 shift = tcg_temp_new_i64(); read_vec_element_i64(shift, get_field(s->fields, v3), 7, ES_8); if (s->fields->op2 == 0x7e) { tcg_gen_andi_i64(shift, shift, 0x7); } else { tcg_gen_andi_i64(shift, shift, 0x78); } gen_gvec_2i_ool(get_field(s->fields, v1), get_field(s->fields, v2), shift, 0, gen_helper_gvec_vsra); tcg_temp_free_i64(shift); return DISAS_NEXT; } target/s390x/vec_int_helper.c +26 −0 Original line number Diff line number Diff line Loading @@ -49,6 +49,26 @@ static void s390_vec_shl(S390Vector *d, const S390Vector *a, uint64_t count) } } static void s390_vec_sar(S390Vector *d, const S390Vector *a, uint64_t count) { uint64_t tmp; if (count == 0) { d->doubleword[0] = a->doubleword[0]; d->doubleword[1] = a->doubleword[1]; } else if (count == 64) { d->doubleword[1] = a->doubleword[0]; d->doubleword[0] = 0; } else if (count < 64) { tmp = a->doubleword[1] >> count; d->doubleword[1] = deposit64(tmp, 64 - count, count, a->doubleword[0]); d->doubleword[0] = (int64_t)a->doubleword[0] >> count; } else { d->doubleword[1] = (int64_t)a->doubleword[0] >> (count - 64); d->doubleword[0] = 0; } } static void s390_vec_shr(S390Vector *d, const S390Vector *a, uint64_t count) { uint64_t tmp; Loading Loading @@ -535,3 +555,9 @@ void HELPER(gvec_vsl)(void *v1, const void *v2, uint64_t count, { s390_vec_shl(v1, v2, count); } void HELPER(gvec_vsra)(void *v1, const void *v2, uint64_t count, uint32_t desc) { s390_vec_sar(v1, v2, count); } Loading
target/s390x/helper.h +1 −0 Original line number Diff line number Diff line Loading @@ -205,6 +205,7 @@ DEF_HELPER_FLAGS_4(gvec_verll16, TCG_CALL_NO_RWG, void, ptr, cptr, i64, i32) DEF_HELPER_FLAGS_4(gvec_verim8, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32) DEF_HELPER_FLAGS_4(gvec_verim16, TCG_CALL_NO_RWG, void, ptr, cptr, cptr, i32) DEF_HELPER_FLAGS_4(gvec_vsl, TCG_CALL_NO_RWG, void, ptr, cptr, i64, i32) DEF_HELPER_FLAGS_4(gvec_vsra, TCG_CALL_NO_RWG, void, ptr, cptr, i64, i32) #ifndef CONFIG_USER_ONLY DEF_HELPER_3(servc, i32, env, i64, i64) Loading
target/s390x/insn-data.def +4 −0 Original line number Diff line number Diff line Loading @@ -1166,6 +1166,10 @@ F(0xe775, VSLB, VRR_c, V, 0, 0, 0, 0, vsl, 0, IF_VEC) /* VECTOR SHIFT LEFT DOUBLE BY BYTE */ F(0xe777, VSLDB, VRI_d, V, 0, 0, 0, 0, vsldb, 0, IF_VEC) /* VECTOR SHIFT RIGHT ARITHMETIC */ F(0xe77e, VSRA, VRR_c, V, 0, 0, 0, 0, vsra, 0, IF_VEC) /* VECTOR SHIFT RIGHT ARITHMETIC BY BYTE */ F(0xe77f, VSRAB, VRR_c, V, 0, 0, 0, 0, vsra, 0, IF_VEC) #ifndef CONFIG_USER_ONLY /* COMPARE AND SWAP AND PURGE */ Loading
target/s390x/translate_vx.inc.c +17 −0 Original line number Diff line number Diff line Loading @@ -2089,3 +2089,20 @@ static DisasJumpType op_vsldb(DisasContext *s, DisasOps *o) tcg_temp_free(t2); return DISAS_NEXT; } static DisasJumpType op_vsra(DisasContext *s, DisasOps *o) { TCGv_i64 shift = tcg_temp_new_i64(); read_vec_element_i64(shift, get_field(s->fields, v3), 7, ES_8); if (s->fields->op2 == 0x7e) { tcg_gen_andi_i64(shift, shift, 0x7); } else { tcg_gen_andi_i64(shift, shift, 0x78); } gen_gvec_2i_ool(get_field(s->fields, v1), get_field(s->fields, v2), shift, 0, gen_helper_gvec_vsra); tcg_temp_free_i64(shift); return DISAS_NEXT; }
target/s390x/vec_int_helper.c +26 −0 Original line number Diff line number Diff line Loading @@ -49,6 +49,26 @@ static void s390_vec_shl(S390Vector *d, const S390Vector *a, uint64_t count) } } static void s390_vec_sar(S390Vector *d, const S390Vector *a, uint64_t count) { uint64_t tmp; if (count == 0) { d->doubleword[0] = a->doubleword[0]; d->doubleword[1] = a->doubleword[1]; } else if (count == 64) { d->doubleword[1] = a->doubleword[0]; d->doubleword[0] = 0; } else if (count < 64) { tmp = a->doubleword[1] >> count; d->doubleword[1] = deposit64(tmp, 64 - count, count, a->doubleword[0]); d->doubleword[0] = (int64_t)a->doubleword[0] >> count; } else { d->doubleword[1] = (int64_t)a->doubleword[0] >> (count - 64); d->doubleword[0] = 0; } } static void s390_vec_shr(S390Vector *d, const S390Vector *a, uint64_t count) { uint64_t tmp; Loading Loading @@ -535,3 +555,9 @@ void HELPER(gvec_vsl)(void *v1, const void *v2, uint64_t count, { s390_vec_shl(v1, v2, count); } void HELPER(gvec_vsra)(void *v1, const void *v2, uint64_t count, uint32_t desc) { s390_vec_sar(v1, v2, count); }