Loading configure +1 −0 Original line number Diff line number Diff line Loading @@ -5894,6 +5894,7 @@ case "$target_name" in TARGET_BASE_ARCH=i386 ;; alpha) mttcg="yes" ;; arm|armeb) TARGET_ARCH=arm Loading target/alpha/cpu.h +3 −0 Original line number Diff line number Diff line Loading @@ -28,6 +28,9 @@ #define CPUArchState struct CPUAlphaState /* Alpha processors have a weak memory model */ #define TCG_GUEST_DEFAULT_MO (0) #include "exec/cpu-defs.h" #include "fpu/softfloat.h" Loading Loading
configure +1 −0 Original line number Diff line number Diff line Loading @@ -5894,6 +5894,7 @@ case "$target_name" in TARGET_BASE_ARCH=i386 ;; alpha) mttcg="yes" ;; arm|armeb) TARGET_ARCH=arm Loading
target/alpha/cpu.h +3 −0 Original line number Diff line number Diff line Loading @@ -28,6 +28,9 @@ #define CPUArchState struct CPUAlphaState /* Alpha processors have a weak memory model */ #define TCG_GUEST_DEFAULT_MO (0) #include "exec/cpu-defs.h" #include "fpu/softfloat.h" Loading