Commit 5e76d84e authored by Paolo Bonzini's avatar Paolo Bonzini
Browse files

target/i386: update MPX flags when CPL changes 



Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent 45726b6e

target/i386/cpu.h

+4 −3
Original line number Diff line number Diff line
@@ -1515,6 +1515,8 @@ int cpu_x86_support_mca_broadcast(CPUX86State *env); 
int cpu_get_pic_interrupt(CPUX86State *s);

/* MSDOS compatibility mode FPU exception support */

void cpu_set_ferr(CPUX86State *s);

/* mpx_helper.c */

void cpu_sync_bndcs_hflags(CPUX86State *env);



/* this function must always be used to load data in the segment

   cache: it synchronizes the hflags with the segment cache values */
@@ -1557,6 +1559,8 @@ static inline void cpu_x86_load_seg_cache(CPUX86State *env, 
#error HF_CPL_MASK is hardcoded

#endif

            env->hflags = (env->hflags & ~HF_CPL_MASK) | cpl;

            /* Possibly switch between BNDCFGS and BNDCFGU */

            cpu_sync_bndcs_hflags(env);

        }

        new_hflags = (env->segs[R_SS].flags & DESC_B_MASK)

            >> (DESC_B_SHIFT - HF_SS32_SHIFT);
@@ -1889,9 +1893,6 @@ void apic_handle_tpr_access_report(DeviceState *d, target_ulong ip, 
 */

void x86_cpu_change_kvm_default(const char *prop, const char *value);



/* mpx_helper.c */

void cpu_sync_bndcs_hflags(CPUX86State *env);



/* Return name of 32-bit register, from a R_* constant */

const char *get_register_name_32(unsigned int reg);