Commit 5d98bf8f authored by Sergey Fedorov's avatar Sergey Fedorov Committed by Peter Maydell
Browse files

target-arm: Fix CPU breakpoint handling 



A QEMU breakpoint match is not definitely an architectural breakpoint
match. If an exception is generated unconditionally during translation,
it is hardly possible to ignore it in the debug exception handler.

Generate a call to a helper to check CPU breakpoints and raise an
exception only if any breakpoint matches architecturally.

Signed-off-by: default avatarSergey Fedorov <serge.fdrv@gmail.com>
Reviewed-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent e63a2d4d

target-arm/helper.h

+2 −0
Original line number Diff line number Diff line
@@ -54,6 +54,8 @@ DEF_HELPER_1(yield, void, env) 
DEF_HELPER_1(pre_hvc, void, env)

DEF_HELPER_2(pre_smc, void, env, i32)



DEF_HELPER_1(check_breakpoints, void, env)



DEF_HELPER_3(cpsr_write, void, env, i32, i32)

DEF_HELPER_1(cpsr_read, i32, env)

target-arm/op_helper.c

+18 −11
Original line number Diff line number Diff line
@@ -867,6 +867,15 @@ static bool check_breakpoints(ARMCPU *cpu) 
    return false;

}



void HELPER(check_breakpoints)(CPUARMState *env)

{

    ARMCPU *cpu = arm_env_get_cpu(env);



    if (check_breakpoints(cpu)) {

        HELPER(exception_internal(env, EXCP_DEBUG));

    }

}



void arm_debug_excp_handler(CPUState *cs)

{

    /* Called by core code when a watchpoint or breakpoint fires;
@@ -898,13 +907,12 @@ void arm_debug_excp_handler(CPUState *cs) 
        }

    } else {

        uint64_t pc = is_a64(env) ? env->pc : env->regs[15];

        bool same_el = (arm_debug_target_el(env) == arm_current_el(env));



        if (cpu_breakpoint_test(cs, pc, BP_GDB)) {

            return;

        }



        if (check_breakpoints(cpu)) {

            bool same_el = (arm_debug_target_el(env) == arm_current_el(env));

        if (extended_addresses_enabled(env)) {

            env->exception.fsr = (1 << 9) | 0x22;

        } else {
@@ -916,7 +924,6 @@ void arm_debug_excp_handler(CPUState *cs) 
                        arm_debug_target_el(env));

    }

}

}



/* ??? Flag setting arithmetic is awkward because we need to do comparisons.

   The only way to do that in TCG is a conditional branch, which clobbers

target-arm/translate-a64.c

+12 −5
Original line number Diff line number Diff line
@@ -11090,12 +11090,19 @@ void gen_intermediate_code_a64(ARMCPU *cpu, TranslationBlock *tb) 
            CPUBreakpoint *bp;

            QTAILQ_FOREACH(bp, &cs->breakpoints, entry) {

                if (bp->pc == dc->pc) {

                    if (bp->flags & BP_CPU) {

                        gen_helper_check_breakpoints(cpu_env);

                        /* End the TB early; it likely won't be executed */

                        dc->is_jmp = DISAS_UPDATE;

                    } else {

                        gen_exception_internal_insn(dc, 0, EXCP_DEBUG);

                        /* Advance PC so that clearing the breakpoint will

                           invalidate this TB.  */

                    dc->pc += 2;

                        dc->pc += 4;

                        goto done_generating;

                    }

                    break;

                }

            }

        }

target-arm/translate.c

+14 −5
Original line number Diff line number Diff line
@@ -11342,12 +11342,21 @@ void gen_intermediate_code(CPUARMState *env, TranslationBlock *tb) 
            CPUBreakpoint *bp;

            QTAILQ_FOREACH(bp, &cs->breakpoints, entry) {

                if (bp->pc == dc->pc) {

                    if (bp->flags & BP_CPU) {

                        gen_helper_check_breakpoints(cpu_env);

                        /* End the TB early; it's likely not going to be executed */

                        dc->is_jmp = DISAS_UPDATE;

                    } else {

                        gen_exception_internal_insn(dc, 0, EXCP_DEBUG);

                        /* Advance PC so that clearing the breakpoint will

                           invalidate this TB.  */

                        /* TODO: Advance PC by correct instruction length to

                         * avoid disassembler error messages */

                        dc->pc += 2;

                        goto done_generating;

                    }

                    break;

                }

            }

        }