Commit 5b9f6345 authored by David Hildenbrand's avatar David Hildenbrand Committed by Cornelia Huck
Browse files

s390x/gdb: support reading/writing of control registers 



Let's support reading and writing of control registers for kvm and tcg.

We have to take care of flushing the tlb (tcg) and pushing the changed
registers into kvm.

Reviewed-by: default avatarChristian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: default avatarDavid Hildenbrand <dahi@linux.vnet.ibm.com>
Signed-off-by: default avatarCornelia Huck <cornelia.huck@de.ibm.com>
parent c0194a00

configure

+1 −1
Original line number Diff line number Diff line
@@ -5392,7 +5392,7 @@ case "$target_name" in 
    echo "TARGET_ABI32=y" >> $config_target_mak

  ;;

  s390x)

    gdb_xml_files="s390x-core64.xml s390-acr.xml s390-fpr.xml s390-vx.xml"

    gdb_xml_files="s390x-core64.xml s390-acr.xml s390-fpr.xml s390-vx.xml s390-cr.xml"

  ;;

  tricore)

  ;;

gdb-xml/s390-cr.xml

0 → 100644
+26 −0
Original line number Diff line number Diff line 
<?xml version="1.0"?>

<!-- Copyright 2015 IBM Corp.



     This work is licensed under the terms of the GNU GPL, version 2 or

     (at your option) any later version. See the COPYING file in the

     top-level directory. -->



<!DOCTYPE feature SYSTEM "gdb-target.dtd">

<feature name="org.gnu.gdb.s390.cr">

  <reg name="cr0" bitsize="64" type="uint64" group="control"/>

  <reg name="cr1" bitsize="64" type="uint64" group="control"/>

  <reg name="cr2" bitsize="64" type="uint64" group="control"/>

  <reg name="cr3" bitsize="64" type="uint64" group="control"/>

  <reg name="cr4" bitsize="64" type="uint64" group="control"/>

  <reg name="cr5" bitsize="64" type="uint64" group="control"/>

  <reg name="cr6" bitsize="64" type="uint64" group="control"/>

  <reg name="cr7" bitsize="64" type="uint64" group="control"/>

  <reg name="cr8" bitsize="64" type="uint64" group="control"/>

  <reg name="cr9" bitsize="64" type="uint64" group="control"/>

  <reg name="cr10" bitsize="64" type="uint64" group="control"/>

  <reg name="cr11" bitsize="64" type="uint64" group="control"/>

  <reg name="cr12" bitsize="64" type="uint64" group="control"/>

  <reg name="cr13" bitsize="64" type="uint64" group="control"/>

  <reg name="cr14" bitsize="64" type="uint64" group="control"/>

  <reg name="cr15" bitsize="64" type="uint64" group="control"/>

</feature>

target-s390x/gdbstub.c

+39 −0
Original line number Diff line number Diff line
@@ -174,6 +174,39 @@ static int cpu_write_vreg(CPUS390XState *env, uint8_t *mem_buf, int n) 
    }

}



/* the values represent the positions in s390-cr.xml */

#define S390_C0_REGNUM 0

#define S390_C15_REGNUM 15

/* total number of registers in s390-cr.xml */

#define S390_NUM_C_REGS 16



#ifndef CONFIG_USER_ONLY

static int cpu_read_c_reg(CPUS390XState *env, uint8_t *mem_buf, int n)

{

    switch (n) {

    case S390_C0_REGNUM ... S390_C15_REGNUM:

        return gdb_get_regl(mem_buf, env->cregs[n]);

    default:

        return 0;

    }

}



static int cpu_write_c_reg(CPUS390XState *env, uint8_t *mem_buf, int n)

{

    switch (n) {

    case S390_C0_REGNUM ... S390_C15_REGNUM:

        env->cregs[n] = ldtul_p(mem_buf);

        if (tcg_enabled()) {

            tlb_flush(ENV_GET_CPU(env), 1);

        }

        cpu_synchronize_post_init(ENV_GET_CPU(env));

        return 8;

    default:

        return 0;

    }

}

#endif



void s390_cpu_gdb_init(CPUState *cs)

{

    gdb_register_coprocessor(cs, cpu_read_ac_reg,
@@ -187,4 +220,10 @@ void s390_cpu_gdb_init(CPUState *cs) 
    gdb_register_coprocessor(cs, cpu_read_vreg,

                             cpu_write_vreg,

                             S390_NUM_VREGS, "s390-vx.xml", 0);



#ifndef CONFIG_USER_ONLY

    gdb_register_coprocessor(cs, cpu_read_c_reg,

                             cpu_write_c_reg,

                             S390_NUM_C_REGS, "s390-cr.xml", 0);

#endif

}