Loading hw/mips/cps.c +4 −3 Original line number Diff line number Diff line Loading @@ -81,11 +81,12 @@ static void mips_cps_realize(DeviceState *dev, Error **errp) error_setg(errp, "%s: CPU initialization failed\n", __func__); return; } env = &cpu->env; /* Init internal devices */ cpu_mips_irq_init_cpu(env); cpu_mips_clock_init(env); cpu_mips_irq_init_cpu(cpu); cpu_mips_clock_init(cpu); env = &cpu->env; if (cpu_mips_itu_supported(env)) { itu_present = true; /* Attach ITC Tag to the VP */ Loading hw/mips/cputimer.c +3 −1 Original line number Diff line number Diff line Loading @@ -151,8 +151,10 @@ static void mips_timer_cb (void *opaque) env->CP0_Count--; } void cpu_mips_clock_init (CPUMIPSState *env) void cpu_mips_clock_init (MIPSCPU *cpu) { CPUMIPSState *env = &cpu->env; /* * If we're in KVM mode, don't create the periodic timer, that is handled in * kernel. Loading hw/mips/mips_fulong2e.c +2 −2 Original line number Diff line number Diff line Loading @@ -334,8 +334,8 @@ static void mips_fulong2e_init(MachineState *machine) } /* Init internal devices */ cpu_mips_irq_init_cpu(env); cpu_mips_clock_init(env); cpu_mips_irq_init_cpu(cpu); cpu_mips_clock_init(cpu); /* North bridge, Bonito --> IP2 */ pci_bus = bonito_init((qemu_irq *)&(env->irq[2])); Loading hw/mips/mips_int.c +2 −1 Original line number Diff line number Diff line Loading @@ -58,8 +58,9 @@ static void cpu_mips_irq_request(void *opaque, int irq, int level) } } void cpu_mips_irq_init_cpu(CPUMIPSState *env) void cpu_mips_irq_init_cpu(MIPSCPU *cpu) { CPUMIPSState *env = &cpu->env; qemu_irq *qi; int i; Loading hw/mips/mips_jazz.c +2 −2 Original line number Diff line number Diff line Loading @@ -201,8 +201,8 @@ static void mips_jazz_init(MachineState *machine, } /* Init CPU internal devices */ cpu_mips_irq_init_cpu(env); cpu_mips_clock_init(env); cpu_mips_irq_init_cpu(cpu); cpu_mips_clock_init(cpu); /* Chipset */ rc4030 = rc4030_init(&dmas, &rc4030_dma_mr); Loading Loading
hw/mips/cps.c +4 −3 Original line number Diff line number Diff line Loading @@ -81,11 +81,12 @@ static void mips_cps_realize(DeviceState *dev, Error **errp) error_setg(errp, "%s: CPU initialization failed\n", __func__); return; } env = &cpu->env; /* Init internal devices */ cpu_mips_irq_init_cpu(env); cpu_mips_clock_init(env); cpu_mips_irq_init_cpu(cpu); cpu_mips_clock_init(cpu); env = &cpu->env; if (cpu_mips_itu_supported(env)) { itu_present = true; /* Attach ITC Tag to the VP */ Loading
hw/mips/cputimer.c +3 −1 Original line number Diff line number Diff line Loading @@ -151,8 +151,10 @@ static void mips_timer_cb (void *opaque) env->CP0_Count--; } void cpu_mips_clock_init (CPUMIPSState *env) void cpu_mips_clock_init (MIPSCPU *cpu) { CPUMIPSState *env = &cpu->env; /* * If we're in KVM mode, don't create the periodic timer, that is handled in * kernel. Loading
hw/mips/mips_fulong2e.c +2 −2 Original line number Diff line number Diff line Loading @@ -334,8 +334,8 @@ static void mips_fulong2e_init(MachineState *machine) } /* Init internal devices */ cpu_mips_irq_init_cpu(env); cpu_mips_clock_init(env); cpu_mips_irq_init_cpu(cpu); cpu_mips_clock_init(cpu); /* North bridge, Bonito --> IP2 */ pci_bus = bonito_init((qemu_irq *)&(env->irq[2])); Loading
hw/mips/mips_int.c +2 −1 Original line number Diff line number Diff line Loading @@ -58,8 +58,9 @@ static void cpu_mips_irq_request(void *opaque, int irq, int level) } } void cpu_mips_irq_init_cpu(CPUMIPSState *env) void cpu_mips_irq_init_cpu(MIPSCPU *cpu) { CPUMIPSState *env = &cpu->env; qemu_irq *qi; int i; Loading
hw/mips/mips_jazz.c +2 −2 Original line number Diff line number Diff line Loading @@ -201,8 +201,8 @@ static void mips_jazz_init(MachineState *machine, } /* Init CPU internal devices */ cpu_mips_irq_init_cpu(env); cpu_mips_clock_init(env); cpu_mips_irq_init_cpu(cpu); cpu_mips_clock_init(cpu); /* Chipset */ rc4030 = rc4030_init(&dmas, &rc4030_dma_mr); Loading