Commit 5a4526b2 authored by Laurent Vivier's avatar Laurent Vivier
Browse files

target-m68k: define 96bit FP registers for gdb on 680x0 



Signed-off-by: default avatarLaurent Vivier <laurent@vivier.eu>
Reviewed-by: default avatarRichard Henderson <rth@twiddle.net>
Message-Id: <20170620205121.26515-5-laurent@vivier.eu>
parent f83311e4

configure

+1 −1
Original line number Diff line number Diff line
@@ -6066,7 +6066,7 @@ case "$target_name" in 
  ;;

  m68k)

    bflt="yes"

    gdb_xml_files="cf-core.xml cf-fp.xml"

    gdb_xml_files="cf-core.xml cf-fp.xml m68k-fp.xml"

  ;;

  microblaze|microblazeel)

    TARGET_ARCH=microblaze

gdb-xml/m68k-fp.xml

0 → 100644
+21 −0
Original line number Diff line number Diff line 
<?xml version="1.0"?>

<!-- Copyright (C) 2008 Free Software Foundation, Inc.



     Copying and distribution of this file, with or without modification,

     are permitted in any medium without royalty provided the copyright

     notice and this notice are preserved.  -->

<!DOCTYPE feature SYSTEM "gdb-target.dtd">

<feature name="org.gnu.gdb.coldfire.fp">

  <reg name="fp0" bitsize="96" type="float" group="float"/>

  <reg name="fp1" bitsize="96" type="float" group="float"/>

  <reg name="fp2" bitsize="96" type="float" group="float"/>

  <reg name="fp3" bitsize="96" type="float" group="float"/>

  <reg name="fp4" bitsize="96" type="float" group="float"/>

  <reg name="fp5" bitsize="96" type="float" group="float"/>

  <reg name="fp6" bitsize="96" type="float" group="float"/>

  <reg name="fp7" bitsize="96" type="float" group="float"/>



  <reg name="fpcontrol" bitsize="32" group="float"/>

  <reg name="fpstatus" bitsize="32" group="float"/>,

  <reg name="fpiaddr" bitsize="32" type="code_ptr" group="float"/>

</feature>

target/m68k/helper.c

+45 −0
Original line number Diff line number Diff line
@@ -102,6 +102,48 @@ static int cf_fpu_gdb_set_reg(CPUM68KState *env, uint8_t *mem_buf, int n) 
    return 0;

}



static int m68k_fpu_gdb_get_reg(CPUM68KState *env, uint8_t *mem_buf, int n)

{

    if (n < 8) {

        stw_be_p(mem_buf, env->fregs[n].l.upper);

        memset(mem_buf + 2, 0, 2);

        stq_be_p(mem_buf + 4, env->fregs[n].l.lower);

        return 12;

    }

    switch (n) {

    case 8: /* fpcontrol */

        stl_be_p(mem_buf, env->fpcr);

        return 4;

    case 9: /* fpstatus */

        stl_be_p(mem_buf, env->fpsr);

        return 4;

    case 10: /* fpiar, not implemented */

        memset(mem_buf, 0, 4);

        return 4;

    }

    return 0;

}



static int m68k_fpu_gdb_set_reg(CPUM68KState *env, uint8_t *mem_buf, int n)

{

    if (n < 8) {

        env->fregs[n].l.upper = lduw_be_p(mem_buf);

        env->fregs[n].l.lower = ldq_be_p(mem_buf + 4);

        return 12;

    }

    switch (n) {

    case 8: /* fpcontrol */

        env->fpcr = ldl_p(mem_buf);

        return 4;

    case 9: /* fpstatus */

        env->fpsr = ldl_p(mem_buf);

        return 4;

    case 10: /* fpiar, not implemented */

        return 4;

    }

    return 0;

}



M68kCPU *cpu_m68k_init(const char *cpu_model)

{

    M68kCPU *cpu;
@@ -130,6 +172,9 @@ void m68k_cpu_init_gdb(M68kCPU *cpu) 
    if (m68k_feature(env, M68K_FEATURE_CF_FPU)) {

        gdb_register_coprocessor(cs, cf_fpu_gdb_get_reg, cf_fpu_gdb_set_reg,

                                 11, "cf-fp.xml", 18);

    } else if (m68k_feature(env, M68K_FEATURE_FPU)) {

        gdb_register_coprocessor(cs, m68k_fpu_gdb_get_reg,

                                 m68k_fpu_gdb_set_reg, 11, "m68k-fp.xml", 18);

    }

    /* TODO: Add [E]MAC registers.  */

}