Commit 59a568b5 authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/kraxel/tags/vga-20190222-pull-request' into staging 



vga: bugfixes and edid support for virtio-vga

# gpg: Signature made Fri 22 Feb 2019 08:24:25 GMT
# gpg:                using RSA key 4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full]
# gpg:                 aka "Gerd Hoffmann <gerd@kraxel.org>" [full]
# gpg:                 aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full]
# Primary key fingerprint: A032 8CFF B93A 17A7 9901  FE7D 4CB6 D8EE D3E8 7138

* remotes/kraxel/tags/vga-20190222-pull-request:
  display/virtio: add edid support.
  virtio-gpu: remove useless 'waiting' field
  virtio-gpu: block both 2d and 3d rendering
  virtio-gpu: remove unused config_size
  virtio-gpu: remove unused qdev

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents 8a4c08b1 1ed2cb32

hw/display/trace-events

+1 −0
Original line number Diff line number Diff line
@@ -35,6 +35,7 @@ vmware_setmode(uint32_t w, uint32_t h, uint32_t bpp) "%dx%d @ %d bpp" 
# hw/display/virtio-gpu.c

virtio_gpu_features(bool virgl) "virgl %d"

virtio_gpu_cmd_get_display_info(void) ""

virtio_gpu_cmd_get_edid(uint32_t scanout) "scanout %d"

virtio_gpu_cmd_set_scanout(uint32_t id, uint32_t res, uint32_t w, uint32_t h, uint32_t x, uint32_t y) "id %d, res 0x%x, w %d, h %d, x %d, y %d"

virtio_gpu_cmd_res_create_2d(uint32_t res, uint32_t fmt, uint32_t w, uint32_t h) "res 0x%x, fmt 0x%x, w %d, h %d"

virtio_gpu_cmd_res_create_3d(uint32_t res, uint32_t fmt, uint32_t w, uint32_t h, uint32_t d) "res 0x%x, fmt 0x%x, w %d, h %d, d %d"

hw/display/virtio-gpu-3d.c

+3 −21
Original line number Diff line number Diff line
@@ -404,11 +404,6 @@ void virtio_gpu_virgl_process_cmd(VirtIOGPU *g, 
{

    VIRTIO_GPU_FILL_CMD(cmd->cmd_hdr);



    cmd->waiting = g->renderer_blocked;

    if (cmd->waiting) {

        return;

    }



    virgl_renderer_force_ctx_0();

    switch (cmd->cmd_hdr.type) {

    case VIRTIO_GPU_CMD_CTX_CREATE:
@@ -468,6 +463,9 @@ void virtio_gpu_virgl_process_cmd(VirtIOGPU *g, 
    case VIRTIO_GPU_CMD_GET_DISPLAY_INFO:

        virtio_gpu_get_display_info(g, cmd);

        break;

    case VIRTIO_GPU_CMD_GET_EDID:

        virtio_gpu_get_edid(g, cmd);

        break;

    default:

        cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC;

        break;
@@ -604,22 +602,6 @@ void virtio_gpu_virgl_reset(VirtIOGPU *g) 
    }

}



void virtio_gpu_gl_block(void *opaque, bool block)

{

    VirtIOGPU *g = opaque;



    if (block) {

        g->renderer_blocked++;

    } else {

        g->renderer_blocked--;

    }

    assert(g->renderer_blocked >= 0);



    if (g->renderer_blocked == 0) {

        virtio_gpu_process_cmdq(g);

    }

}



int virtio_gpu_virgl_init(VirtIOGPU *g)

{

    int ret;

hw/display/virtio-gpu.c

+65 −9
Original line number Diff line number Diff line
@@ -21,6 +21,7 @@ 
#include "hw/virtio/virtio.h"

#include "hw/virtio/virtio-gpu.h"

#include "hw/virtio/virtio-bus.h"

#include "hw/display/edid.h"

#include "migration/blocker.h"

#include "qemu/log.h"

#include "qapi/error.h"
@@ -207,6 +208,9 @@ static uint64_t virtio_gpu_get_features(VirtIODevice *vdev, uint64_t features, 
    if (virtio_gpu_virgl_enabled(g->conf)) {

        features |= (1 << VIRTIO_GPU_F_VIRGL);

    }

    if (virtio_gpu_edid_enabled(g->conf)) {

        features |= (1 << VIRTIO_GPU_F_EDID);

    }

    return features;

}
@@ -301,6 +305,40 @@ void virtio_gpu_get_display_info(VirtIOGPU *g, 
                             sizeof(display_info));

}



static void

virtio_gpu_generate_edid(VirtIOGPU *g, int scanout,

                         struct virtio_gpu_resp_edid *edid)

{

    qemu_edid_info info = {

        .prefx = g->req_state[scanout].width,

        .prefy = g->req_state[scanout].height,

    };



    edid->size = cpu_to_le32(sizeof(edid->edid));

    qemu_edid_generate(edid->edid, sizeof(edid->edid), &info);

}



void virtio_gpu_get_edid(VirtIOGPU *g,

                         struct virtio_gpu_ctrl_command *cmd)

{

    struct virtio_gpu_resp_edid edid;

    struct virtio_gpu_cmd_get_edid get_edid;



    VIRTIO_GPU_FILL_CMD(get_edid);

    virtio_gpu_bswap_32(&get_edid, sizeof(get_edid));



    if (get_edid.scanout >= g->conf.max_outputs) {

        cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER;

        return;

    }



    trace_virtio_gpu_cmd_get_edid(get_edid.scanout);

    memset(&edid, 0, sizeof(edid));

    edid.hdr.type = VIRTIO_GPU_RESP_OK_EDID;

    virtio_gpu_generate_edid(g, get_edid.scanout, &edid);

    virtio_gpu_ctrl_response(g, cmd, &edid.hdr, sizeof(edid));

}



static pixman_format_code_t get_pixman_format(uint32_t virtio_gpu_format)

{

    switch (virtio_gpu_format) {
@@ -839,6 +877,9 @@ static void virtio_gpu_simple_process_cmd(VirtIOGPU *g, 
    case VIRTIO_GPU_CMD_GET_DISPLAY_INFO:

        virtio_gpu_get_display_info(g, cmd);

        break;

    case VIRTIO_GPU_CMD_GET_EDID:

        virtio_gpu_get_edid(g, cmd);

        break;

    case VIRTIO_GPU_CMD_RESOURCE_CREATE_2D:

        virtio_gpu_resource_create_2d(g, cmd);

        break;
@@ -889,12 +930,14 @@ void virtio_gpu_process_cmdq(VirtIOGPU *g) 
    while (!QTAILQ_EMPTY(&g->cmdq)) {

        cmd = QTAILQ_FIRST(&g->cmdq);



        if (g->renderer_blocked) {

            break;

        }



        /* process command */

        VIRGL(g, virtio_gpu_virgl_process_cmd, virtio_gpu_simple_process_cmd,

              g, cmd);

        if (cmd->waiting) {

            break;

        }



        QTAILQ_REMOVE(&g->cmdq, cmd, next);

        if (virtio_gpu_stats_enabled(g->conf)) {

            g->stats.requests++;
@@ -936,7 +979,6 @@ static void virtio_gpu_handle_ctrl(VirtIODevice *vdev, VirtQueue *vq) 
        cmd->vq = vq;

        cmd->error = 0;

        cmd->finished = false;

        cmd->waiting = false;

        QTAILQ_INSERT_TAIL(&g->cmdq, cmd, next);

        cmd = virtqueue_pop(vq, sizeof(struct virtio_gpu_ctrl_command));

    }
@@ -1030,14 +1072,28 @@ static int virtio_gpu_ui_info(void *opaque, uint32_t idx, QemuUIInfo *info) 
    return 0;

}



static void virtio_gpu_gl_block(void *opaque, bool block)

{

    VirtIOGPU *g = opaque;



    if (block) {

        g->renderer_blocked++;

    } else {

        g->renderer_blocked--;

    }

    assert(g->renderer_blocked >= 0);



    if (g->renderer_blocked == 0) {

        virtio_gpu_process_cmdq(g);

    }

}



const GraphicHwOps virtio_gpu_ops = {

    .invalidate = virtio_gpu_invalidate_display,

    .gfx_update = virtio_gpu_update_display,

    .text_update = virtio_gpu_text_update,

    .ui_info = virtio_gpu_ui_info,

#ifdef CONFIG_VIRGL

    .gl_block = virtio_gpu_gl_block,

#endif

};



static const VMStateDescription vmstate_virtio_gpu_scanout = {
@@ -1238,10 +1294,9 @@ static void virtio_gpu_device_realize(DeviceState *qdev, Error **errp) 
        }

    }



    g->config_size = sizeof(struct virtio_gpu_config);

    g->virtio_config.num_scanouts = cpu_to_le32(g->conf.max_outputs);

    virtio_init(VIRTIO_DEVICE(g), "virtio-gpu", VIRTIO_ID_GPU,

                g->config_size);

                sizeof(struct virtio_gpu_config));



    g->req_state[0].width = g->conf.xres;

    g->req_state[0].height = g->conf.yres;
@@ -1268,7 +1323,6 @@ static void virtio_gpu_device_realize(DeviceState *qdev, Error **errp) 
    QTAILQ_INIT(&g->fenceq);



    g->enabled_output_bitmask = 1;

    g->qdev = qdev;



    for (i = 0; i < g->conf.max_outputs; i++) {

        g->scanout[i].con =
@@ -1356,6 +1410,8 @@ static Property virtio_gpu_properties[] = { 
    DEFINE_PROP_BIT("stats", VirtIOGPU, conf.flags,

                    VIRTIO_GPU_FLAG_STATS_ENABLED, false),

#endif

    DEFINE_PROP_BIT("edid", VirtIOGPU, conf.flags,

                    VIRTIO_GPU_FLAG_EDID_ENABLED, false),

    DEFINE_PROP_UINT32("xres", VirtIOGPU, conf.xres, 1024),

    DEFINE_PROP_UINT32("yres", VirtIOGPU, conf.yres, 768),

    DEFINE_PROP_END_OF_LIST(),

include/hw/virtio/virtio-gpu.h

+5 −5
Original line number Diff line number Diff line
@@ -61,12 +61,15 @@ struct virtio_gpu_requested_state { 
enum virtio_gpu_conf_flags {

    VIRTIO_GPU_FLAG_VIRGL_ENABLED = 1,

    VIRTIO_GPU_FLAG_STATS_ENABLED,

    VIRTIO_GPU_FLAG_EDID_ENABLED,

};



#define virtio_gpu_virgl_enabled(_cfg) \

    (_cfg.flags & (1 << VIRTIO_GPU_FLAG_VIRGL_ENABLED))

#define virtio_gpu_stats_enabled(_cfg) \

    (_cfg.flags & (1 << VIRTIO_GPU_FLAG_STATS_ENABLED))

#define virtio_gpu_edid_enabled(_cfg) \

    (_cfg.flags & (1 << VIRTIO_GPU_FLAG_EDID_ENABLED))



struct virtio_gpu_conf {

    uint64_t max_hostmem;
@@ -81,7 +84,6 @@ struct virtio_gpu_ctrl_command { 
    VirtQueue *vq;

    struct virtio_gpu_ctrl_hdr cmd_hdr;

    uint32_t error;

    bool waiting;

    bool finished;

    QTAILQ_ENTRY(virtio_gpu_ctrl_command) next;

};
@@ -96,9 +98,6 @@ typedef struct VirtIOGPU { 


    int enable;



    int config_size;

    DeviceState *qdev;



    QTAILQ_HEAD(, virtio_gpu_simple_resource) reslist;

    QTAILQ_HEAD(, virtio_gpu_ctrl_command) cmdq;

    QTAILQ_HEAD(, virtio_gpu_ctrl_command) fenceq;
@@ -159,6 +158,8 @@ void virtio_gpu_ctrl_response_nodata(VirtIOGPU *g, 
                                     enum virtio_gpu_ctrl_type type);

void virtio_gpu_get_display_info(VirtIOGPU *g,

                                 struct virtio_gpu_ctrl_command *cmd);

void virtio_gpu_get_edid(VirtIOGPU *g,

                         struct virtio_gpu_ctrl_command *cmd);

int virtio_gpu_create_mapping_iov(VirtIOGPU *g,

                                  struct virtio_gpu_resource_attach_backing *ab,

                                  struct virtio_gpu_ctrl_command *cmd,
@@ -172,7 +173,6 @@ void virtio_gpu_virgl_process_cmd(VirtIOGPU *g, 
                                  struct virtio_gpu_ctrl_command *cmd);

void virtio_gpu_virgl_fence_poll(VirtIOGPU *g);

void virtio_gpu_virgl_reset(VirtIOGPU *g);

void virtio_gpu_gl_block(void *opaque, bool block);

int virtio_gpu_virgl_init(VirtIOGPU *g);

int virtio_gpu_virgl_get_num_capsets(VirtIOGPU *g);

#endif