Commit 597d6bb3 authored by Cédric Le Goater's avatar Cédric Le Goater Committed by Peter Maydell
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aspeed/smc: define registers for all possible CS 



The model should expose one control register per possible CS. When
testing the validity of the register number in the read operation,
replace 's->num_cs' by 'ctrl->max_slaves' which represents the maximum
number of flash devices a controller can handle.

Signed-off-by: default avatarCédric Le Goater <clg@kaod.org>
Reviewed-by: default avatarJoel Stanley <joel@jms.id.au>
Message-id: 20190124140519.13838-3-clg@kaod.org
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent b617ca92

hw/ssi/aspeed_smc.c

+1 −1
Original line number Diff line number Diff line
@@ -665,7 +665,7 @@ static uint64_t aspeed_smc_read(void *opaque, hwaddr addr, unsigned int size) 
        addr == s->r_ce_ctrl ||

        addr == R_INTR_CTRL ||

        (addr >= R_SEG_ADDR0 && addr < R_SEG_ADDR0 + s->ctrl->max_slaves) ||

        (addr >= s->r_ctrl0 && addr < s->r_ctrl0 + s->num_cs)) {

        (addr >= s->r_ctrl0 && addr < s->r_ctrl0 + s->ctrl->max_slaves)) {

        return s->regs[addr];

    } else {

        qemu_log_mask(LOG_UNIMP, "%s: not implemented: 0x%" HWADDR_PRIx "\n",