Commit 597cf978 authored by Richard Henderson's avatar Richard Henderson
Browse files

tcg/ppc: Support vector dup2 



This is only used for 32-bit hosts.

Tested-by: default avatarMark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: default avatarAleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Signed-off-by: default avatarAleksandar Markovic <amarkovic@wavecomp.com>
parent d9897efa

tcg/ppc/tcg-target.inc.c

+9 −0
Original line number Diff line number Diff line
@@ -3102,6 +3102,14 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc, 
        }

        break;



    case INDEX_op_dup2_vec:

        assert(TCG_TARGET_REG_BITS == 32);

        /* With inputs a1 = xLxx, a2 = xHxx  */

        tcg_out32(s, VMRGHW | VRT(a0) | VRA(a2) | VRB(a1));  /* a0  = xxHL */

        tcg_out_vsldoi(s, TCG_VEC_TMP1, a0, a0, 8);          /* tmp = HLxx */

        tcg_out_vsldoi(s, a0, a0, TCG_VEC_TMP1, 8);          /* a0  = HLHL */

        return;



    case INDEX_op_ppc_mrgh_vec:

        insn = mrgh_op[vece];

        break;
@@ -3480,6 +3488,7 @@ static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op) 
    case INDEX_op_ppc_mulou_vec:

    case INDEX_op_ppc_pkum_vec:

    case INDEX_op_ppc_rotl_vec:

    case INDEX_op_dup2_vec:

        return &v_v_v;

    case INDEX_op_not_vec:

    case INDEX_op_dup_vec: