Commit 59227d5d authored by Richard Henderson's avatar Richard Henderson
Browse files

tcg: Merge memop and mmu_idx parameters to qemu_ld/st 



At the tcg opcode level, not at the tcg-op.h generator level.
This requires minor changes through all of the tcg backends,
but none of the cpu translators.

Reviewed-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: default avatarRichard Henderson <rth@twiddle.net>
parent 1eeace9c

tcg/aarch64/tcg-target.c

+8 −4
Original line number Diff line number Diff line
@@ -1197,9 +1197,11 @@ static void tcg_out_qemu_st_direct(TCGContext *s, TCGMemOp memop, 
}



static void tcg_out_qemu_ld(TCGContext *s, TCGReg data_reg, TCGReg addr_reg,

                            TCGMemOp memop, TCGType ext, int mem_index)

                            TCGMemOpIdx oi, TCGType ext)

{

    TCGMemOp memop = get_memop(oi);

#ifdef CONFIG_SOFTMMU

    unsigned mem_index = get_mmuidx(oi);

    TCGMemOp s_bits = memop & MO_SIZE;

    tcg_insn_unit *label_ptr;
@@ -1214,9 +1216,11 @@ static void tcg_out_qemu_ld(TCGContext *s, TCGReg data_reg, TCGReg addr_reg, 
}



static void tcg_out_qemu_st(TCGContext *s, TCGReg data_reg, TCGReg addr_reg,

                            TCGMemOp memop, int mem_index)

                            TCGMemOpIdx oi)

{

    TCGMemOp memop = get_memop(oi);

#ifdef CONFIG_SOFTMMU

    unsigned mem_index = get_mmuidx(oi);

    TCGMemOp s_bits = memop & MO_SIZE;

    tcg_insn_unit *label_ptr;
@@ -1515,11 +1519,11 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, 


    case INDEX_op_qemu_ld_i32:

    case INDEX_op_qemu_ld_i64:

        tcg_out_qemu_ld(s, a0, a1, a2, ext, args[3]);

        tcg_out_qemu_ld(s, a0, a1, a2, ext);

        break;

    case INDEX_op_qemu_st_i32:

    case INDEX_op_qemu_st_i64:

        tcg_out_qemu_st(s, REG0(0), a1, a2, args[3]);

        tcg_out_qemu_st(s, REG0(0), a1, a2);

        break;



    case INDEX_op_bswap64_i64:

tcg/arm/tcg-target.c

+8 −4
Original line number Diff line number Diff line
@@ -1463,6 +1463,7 @@ static inline void tcg_out_qemu_ld_direct(TCGContext *s, TCGMemOp opc, 
static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is64)

{

    TCGReg addrlo, datalo, datahi, addrhi __attribute__((unused));

    TCGMemOpIdx oi;

    TCGMemOp opc;

#ifdef CONFIG_SOFTMMU

    int mem_index;
@@ -1474,10 +1475,11 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is64) 
    datahi = (is64 ? *args++ : 0);

    addrlo = *args++;

    addrhi = (TARGET_LONG_BITS == 64 ? *args++ : 0);

    opc = *args++;

    oi = *args++;

    opc = get_memop(oi);



#ifdef CONFIG_SOFTMMU

    mem_index = *args;

    mem_index = get_mmuidx(oi);

    addend = tcg_out_tlb_read(s, addrlo, addrhi, opc & MO_SIZE, mem_index, 1);



    /* This a conditional BL only to load a pointer within this opcode into LR
@@ -1592,6 +1594,7 @@ static inline void tcg_out_qemu_st_direct(TCGContext *s, TCGMemOp opc, 
static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is64)

{

    TCGReg addrlo, datalo, datahi, addrhi __attribute__((unused));

    TCGMemOpIdx oi;

    TCGMemOp opc;

#ifdef CONFIG_SOFTMMU

    int mem_index;
@@ -1603,10 +1606,11 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is64) 
    datahi = (is64 ? *args++ : 0);

    addrlo = *args++;

    addrhi = (TARGET_LONG_BITS == 64 ? *args++ : 0);

    opc = *args++;

    oi = *args++;

    opc = get_memop(oi);



#ifdef CONFIG_SOFTMMU

    mem_index = *args;

    mem_index = get_mmuidx(oi);

    addend = tcg_out_tlb_read(s, addrlo, addrhi, opc & MO_SIZE, mem_index, 0);



    tcg_out_qemu_st_index(s, COND_EQ, opc, datalo, datahi, addrlo, addend);

tcg/i386/tcg-target.c

+8 −4
Original line number Diff line number Diff line
@@ -1531,6 +1531,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is64) 
{

    TCGReg datalo, datahi, addrlo;

    TCGReg addrhi __attribute__((unused));

    TCGMemOpIdx oi;

    TCGMemOp opc;

#if defined(CONFIG_SOFTMMU)

    int mem_index;
@@ -1542,10 +1543,11 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is64) 
    datahi = (TCG_TARGET_REG_BITS == 32 && is64 ? *args++ : 0);

    addrlo = *args++;

    addrhi = (TARGET_LONG_BITS > TCG_TARGET_REG_BITS ? *args++ : 0);

    opc = *args++;

    oi = *args++;

    opc = get_memop(oi);



#if defined(CONFIG_SOFTMMU)

    mem_index = *args++;

    mem_index = get_mmuidx(oi);

    s_bits = opc & MO_SIZE;



    tcg_out_tlb_load(s, addrlo, addrhi, mem_index, s_bits,
@@ -1662,6 +1664,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is64) 
{

    TCGReg datalo, datahi, addrlo;

    TCGReg addrhi __attribute__((unused));

    TCGMemOpIdx oi;

    TCGMemOp opc;

#if defined(CONFIG_SOFTMMU)

    int mem_index;
@@ -1673,10 +1676,11 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is64) 
    datahi = (TCG_TARGET_REG_BITS == 32 && is64 ? *args++ : 0);

    addrlo = *args++;

    addrhi = (TARGET_LONG_BITS > TCG_TARGET_REG_BITS ? *args++ : 0);

    opc = *args++;

    oi = *args++;

    opc = get_memop(oi);



#if defined(CONFIG_SOFTMMU)

    mem_index = *args++;

    mem_index = get_mmuidx(oi);

    s_bits = opc & MO_SIZE;



    tcg_out_tlb_load(s, addrlo, addrhi, mem_index, s_bits,

tcg/ia64/tcg-target.c

+8 −4
Original line number Diff line number Diff line
@@ -1634,14 +1634,16 @@ static inline void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args) 
        OPC_LD1_M1, OPC_LD2_M1, OPC_LD4_M1, OPC_LD8_M1

    };

    int addr_reg, data_reg, mem_index;

    TCGMemOpIdx oi;

    TCGMemOp opc, s_bits;

    uint64_t fin1, fin2;

    tcg_insn_unit *label_ptr;



    data_reg = args[0];

    addr_reg = args[1];

    opc = args[2];

    mem_index = args[3];

    oi = args[2];

    opc = get_memop(oi);

    mem_index = get_mmuidx(oi);

    s_bits = opc & MO_SIZE;



    /* Read the TLB entry */
@@ -1696,13 +1698,15 @@ static inline void tcg_out_qemu_st(TCGContext *s, const TCGArg *args) 
    TCGReg addr_reg, data_reg;

    int mem_index;

    uint64_t pre1, pre2;

    TCGMemOpIdx oi;

    TCGMemOp opc, s_bits;

    tcg_insn_unit *label_ptr;



    data_reg = args[0];

    addr_reg = args[1];

    opc = args[2];

    mem_index = args[3];

    oi = args[2];

    opc = get_memop(oi);

    mem_index = get_mmuidx(oi);

    s_bits = opc & MO_SIZE;



    /* Note that we always use LE helper functions, so the bswap insns

tcg/mips/tcg-target.c

+8 −4
Original line number Diff line number Diff line
@@ -1150,6 +1150,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is_64) 
{

    TCGReg addr_regl, addr_regh __attribute__((unused));

    TCGReg data_regl, data_regh;

    TCGMemOpIdx oi;

    TCGMemOp opc;

#if defined(CONFIG_SOFTMMU)

    tcg_insn_unit *label_ptr[2];
@@ -1164,10 +1165,11 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is_64) 
    data_regh = (is_64 ? *args++ : 0);

    addr_regl = *args++;

    addr_regh = (TARGET_LONG_BITS == 64 ? *args++ : 0);

    opc = *args++;

    oi = *args++;

    opc = get_memop(oi);



#if defined(CONFIG_SOFTMMU)

    mem_index = *args;

    mem_index = get_mmuidx(oi);

    s_bits = opc & MO_SIZE;



    tcg_out_tlb_load(s, base, addr_regl, addr_regh, mem_index,
@@ -1279,6 +1281,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is_64) 
{

    TCGReg addr_regl, addr_regh __attribute__((unused));

    TCGReg data_regl, data_regh, base;

    TCGMemOpIdx oi;

    TCGMemOp opc;

#if defined(CONFIG_SOFTMMU)

    tcg_insn_unit *label_ptr[2];
@@ -1290,10 +1293,11 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is_64) 
    data_regh = (is_64 ? *args++ : 0);

    addr_regl = *args++;

    addr_regh = (TARGET_LONG_BITS == 64 ? *args++ : 0);

    opc = *args++;

    oi = *args++;

    opc = get_memop(oi);



#if defined(CONFIG_SOFTMMU)

    mem_index = *args;

    mem_index = get_mmuidx(oi);

    s_bits = opc & 3;



    /* Note that we eliminated the helper's address argument,