Commit 584105ea authored by Prem Mallappa's avatar Prem Mallappa Committed by Peter Maydell
Browse files

hw/arm/virt: Add SMMUv3 to the virt board 



Add code to instantiate an smmuv3 in virt machine. A new iommu
integer member is introduced in VirtMachineState to store the type
of the iommu in use.

Signed-off-by: default avatarPrem Mallappa <prem.mallappa@broadcom.com>
Signed-off-by: default avatarEric Auger <eric.auger@redhat.com>
Reviewed-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Message-id: 1524665762-31355-13-git-send-email-eric.auger@redhat.com
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent b05c81d2

hw/arm/virt.c

+63 −1
Original line number Diff line number Diff line
@@ -58,6 +58,7 @@ 
#include "hw/smbios/smbios.h"

#include "qapi/visitor.h"

#include "standard-headers/linux/input.h"

#include "hw/arm/smmuv3.h"



#define DEFINE_VIRT_MACHINE_LATEST(major, minor, latest) \

    static void virt_##major##_##minor##_class_init(ObjectClass *oc, \
@@ -141,6 +142,7 @@ static const MemMapEntry a15memmap[] = { 
    [VIRT_FW_CFG] =             { 0x09020000, 0x00000018 },

    [VIRT_GPIO] =               { 0x09030000, 0x00001000 },

    [VIRT_SECURE_UART] =        { 0x09040000, 0x00001000 },

    [VIRT_SMMU] =               { 0x09050000, 0x00020000 },

    [VIRT_MMIO] =               { 0x0a000000, 0x00000200 },

    /* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */

    [VIRT_PLATFORM_BUS] =       { 0x0c000000, 0x02000000 },
@@ -161,6 +163,7 @@ static const int a15irqmap[] = { 
    [VIRT_SECURE_UART] = 8,

    [VIRT_MMIO] = 16, /* ...to 16 + NUM_VIRTIO_TRANSPORTS - 1 */

    [VIRT_GIC_V2M] = 48, /* ...to 48 + NUM_GICV2M_SPIS - 1 */

    [VIRT_SMMU] = 74,    /* ...to 74 + NUM_SMMU_IRQS - 1 */

    [VIRT_PLATFORM_BUS] = 112, /* ...to 112 + PLATFORM_BUS_NUM_IRQS -1 */

};
@@ -942,7 +945,57 @@ static void create_pcie_irq_map(const VirtMachineState *vms, 
                           0x7           /* PCI irq */);

}



static void create_pcie(const VirtMachineState *vms, qemu_irq *pic)

static void create_smmu(const VirtMachineState *vms, qemu_irq *pic,

                        PCIBus *bus)

{

    char *node;

    const char compat[] = "arm,smmu-v3";

    int irq =  vms->irqmap[VIRT_SMMU];

    int i;

    hwaddr base = vms->memmap[VIRT_SMMU].base;

    hwaddr size = vms->memmap[VIRT_SMMU].size;

    const char irq_names[] = "eventq\0priq\0cmdq-sync\0gerror";

    DeviceState *dev;



    if (vms->iommu != VIRT_IOMMU_SMMUV3 || !vms->iommu_phandle) {

        return;

    }



    dev = qdev_create(NULL, "arm-smmuv3");



    object_property_set_link(OBJECT(dev), OBJECT(bus), "primary-bus",

                             &error_abort);

    qdev_init_nofail(dev);

    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);

    for (i = 0; i < NUM_SMMU_IRQS; i++) {

        sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, pic[irq + i]);

    }



    node = g_strdup_printf("/smmuv3@%" PRIx64, base);

    qemu_fdt_add_subnode(vms->fdt, node);

    qemu_fdt_setprop(vms->fdt, node, "compatible", compat, sizeof(compat));

    qemu_fdt_setprop_sized_cells(vms->fdt, node, "reg", 2, base, 2, size);



    qemu_fdt_setprop_cells(vms->fdt, node, "interrupts",

            GIC_FDT_IRQ_TYPE_SPI, irq    , GIC_FDT_IRQ_FLAGS_EDGE_LO_HI,

            GIC_FDT_IRQ_TYPE_SPI, irq + 1, GIC_FDT_IRQ_FLAGS_EDGE_LO_HI,

            GIC_FDT_IRQ_TYPE_SPI, irq + 2, GIC_FDT_IRQ_FLAGS_EDGE_LO_HI,

            GIC_FDT_IRQ_TYPE_SPI, irq + 3, GIC_FDT_IRQ_FLAGS_EDGE_LO_HI);



    qemu_fdt_setprop(vms->fdt, node, "interrupt-names", irq_names,

                     sizeof(irq_names));



    qemu_fdt_setprop_cell(vms->fdt, node, "clocks", vms->clock_phandle);

    qemu_fdt_setprop_string(vms->fdt, node, "clock-names", "apb_pclk");

    qemu_fdt_setprop(vms->fdt, node, "dma-coherent", NULL, 0);



    qemu_fdt_setprop_cell(vms->fdt, node, "#iommu-cells", 1);



    qemu_fdt_setprop_cell(vms->fdt, node, "phandle", vms->iommu_phandle);

    g_free(node);

}



static void create_pcie(VirtMachineState *vms, qemu_irq *pic)

{

    hwaddr base_mmio = vms->memmap[VIRT_PCIE_MMIO].base;

    hwaddr size_mmio = vms->memmap[VIRT_PCIE_MMIO].size;
@@ -1056,6 +1109,15 @@ static void create_pcie(const VirtMachineState *vms, qemu_irq *pic) 
    qemu_fdt_setprop_cell(vms->fdt, nodename, "#interrupt-cells", 1);

    create_pcie_irq_map(vms, vms->gic_phandle, irq, nodename);



    if (vms->iommu) {

        vms->iommu_phandle = qemu_fdt_alloc_phandle(vms->fdt);



        create_smmu(vms, pic, pci->bus);



        qemu_fdt_setprop_cells(vms->fdt, nodename, "iommu-map",

                               0x0, vms->iommu_phandle, 0x0, 0x10000);

    }



    g_free(nodename);

}

include/hw/arm/virt.h

+10 −0
Original line number Diff line number Diff line
@@ -38,6 +38,7 @@ 


#define NUM_GICV2M_SPIS       64

#define NUM_VIRTIO_TRANSPORTS 32

#define NUM_SMMU_IRQS          4



#define ARCH_GICV3_MAINT_IRQ  9
@@ -59,6 +60,7 @@ enum { 
    VIRT_GIC_V2M,

    VIRT_GIC_ITS,

    VIRT_GIC_REDIST,

    VIRT_SMMU,

    VIRT_UART,

    VIRT_MMIO,

    VIRT_RTC,
@@ -74,6 +76,12 @@ enum { 
    VIRT_SECURE_MEM,

};



typedef enum VirtIOMMUType {

    VIRT_IOMMU_NONE,

    VIRT_IOMMU_SMMUV3,

    VIRT_IOMMU_VIRTIO,

} VirtIOMMUType;



typedef struct MemMapEntry {

    hwaddr base;

    hwaddr size;
@@ -97,6 +105,7 @@ typedef struct { 
    bool its;

    bool virt;

    int32_t gic_version;

    VirtIOMMUType iommu;

    struct arm_boot_info bootinfo;

    const MemMapEntry *memmap;

    const int *irqmap;
@@ -106,6 +115,7 @@ typedef struct { 
    uint32_t clock_phandle;

    uint32_t gic_phandle;

    uint32_t msi_phandle;

    uint32_t iommu_phandle;

    int psci_conduit;

} VirtMachineState;