Commit 5705b536 authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20171213' into staging 



target-arm queue:
 * xilinx_spips: set reset values correctly
 * MAINTAINERS: fix an email address
 * hw/display/tc6393xb: limit irq handler index to TC6393XB_GPIOS
 * nvic: Make systick banked for v8M
 * refactor get_phys_addr() so we can return the right format PAR
   for ATS operations
 * implement v8M TT instruction
 * fix some minor v8M bugs
 * Implement reset for GICv3 ITS
 * xlnx-zcu102: Add support for the ZynqMP QSPI

# gpg: Signature made Wed 13 Dec 2017 18:01:31 GMT
# gpg:                using RSA key 0x3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>"
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20171213: (43 commits)
  xilinx_spips: Use memset instead of a for loop to zero registers
  xilinx_spips: Set all of the reset values
  xilinx_spips: Update the QSPI Mod ID reset value
  MAINTAINERS: replace the unavailable email address
  hw/display/tc6393xb: limit irq handler index to TC6393XB_GPIOS
  nvic: Make systick banked
  nvic: Make nvic_sysreg_ns_ops work with any MemoryRegion
  target/arm: Extend PAR format determination
  target/arm: Remove fsr argument from get_phys_addr() and arm_tlb_fill()
  target/arm: Ignore fsr from get_phys_addr() in do_ats_write()
  target/arm: Use ARMMMUFaultInfo in deliver_fault()
  target/arm: Convert get_phys_addr_pmsav8() to not return FSC values
  target/arm: Convert get_phys_addr_pmsav7() to not return FSC values
  target/arm: Convert get_phys_addr_pmsav5() to not return FSC values
  target/arm: Convert get_phys_addr_lpae() to not return FSC values
  target/arm: Convert get_phys_addr_v6() to not return FSC values
  target/arm: Convert get_phys_addr_v5() to not return FSC values
  target/arm: Remove fsr argument from arm_ld*_ptw()
  target/arm: Provide fault type enum and FSR conversion functions
  target/arm: Implement TT instruction
  ...

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents f44cedc9 d3c348b6

MAINTAINERS

+1 −1
Original line number Diff line number Diff line
@@ -543,7 +543,7 @@ F: include/hw/*/xlnx*.h 


ARM ACPI Subsystem

M: Shannon Zhao <zhaoshenglong@huawei.com>

M: Shannon Zhao <shannon.zhao@linaro.org>

M: Shannon Zhao <shannon.zhaosl@gmail.com>

L: qemu-arm@nongnu.org

S: Maintained

F: hw/arm/virt-acpi-build.c

default-configs/arm-softmmu.mak

+1 −1
Original line number Diff line number Diff line
@@ -130,5 +130,5 @@ CONFIG_SMBIOS=y 
CONFIG_ASPEED_SOC=y

CONFIG_GPIO_KEY=y

CONFIG_MSF2=y



CONFIG_FW_CFG_DMA=y

CONFIG_XILINX_AXI=y

hw/arm/xlnx-zcu102.c

+23 −0
Original line number Diff line number Diff line
@@ -151,6 +151,29 @@ static void xlnx_zynqmp_init(XlnxZCU102 *s, MachineState *machine) 
        sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.spi[i]), 1, cs_line);

    }



    for (i = 0; i < XLNX_ZYNQMP_NUM_QSPI_FLASH; i++) {

        SSIBus *spi_bus;

        DeviceState *flash_dev;

        qemu_irq cs_line;

        DriveInfo *dinfo = drive_get_next(IF_MTD);

        int bus = i / XLNX_ZYNQMP_NUM_QSPI_BUS_CS;

        gchar *bus_name = g_strdup_printf("qspi%d", bus);



        spi_bus = (SSIBus *)qdev_get_child_bus(DEVICE(&s->soc), bus_name);

        g_free(bus_name);



        flash_dev = ssi_create_slave_no_init(spi_bus, "n25q512a11");

        if (dinfo) {

            qdev_prop_set_drive(flash_dev, "drive", blk_by_legacy_dinfo(dinfo),

                                &error_fatal);

        }

        qdev_init_nofail(flash_dev);



        cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0);



        sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.qspi), i + 1, cs_line);

    }



    /* TODO create and connect IDE devices for ide_drive_get() */



    xlnx_zcu102_binfo.ram_size = ram_size;

hw/arm/xlnx-zynqmp.c

+26 −0
Original line number Diff line number Diff line
@@ -40,6 +40,10 @@ 
#define SATA_ADDR           0xFD0C0000

#define SATA_NUM_PORTS      2



#define QSPI_ADDR           0xff0f0000

#define LQSPI_ADDR          0xc0000000

#define QSPI_IRQ            15



#define DP_ADDR             0xfd4a0000

#define DP_IRQ              113
@@ -171,6 +175,9 @@ static void xlnx_zynqmp_init(Object *obj) 
        qdev_set_parent_bus(DEVICE(&s->spi[i]), sysbus_get_default());

    }



    object_initialize(&s->qspi, sizeof(s->qspi), TYPE_XLNX_ZYNQMP_QSPIPS);

    qdev_set_parent_bus(DEVICE(&s->qspi), sysbus_get_default());



    object_initialize(&s->dp, sizeof(s->dp), TYPE_XLNX_DP);

    qdev_set_parent_bus(DEVICE(&s->dp), sysbus_get_default());
@@ -411,6 +418,25 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) 
        g_free(bus_name);

    }



    object_property_set_bool(OBJECT(&s->qspi), true, "realized", &err);

    sysbus_mmio_map(SYS_BUS_DEVICE(&s->qspi), 0, QSPI_ADDR);

    sysbus_mmio_map(SYS_BUS_DEVICE(&s->qspi), 1, LQSPI_ADDR);

    sysbus_connect_irq(SYS_BUS_DEVICE(&s->qspi), 0, gic_spi[QSPI_IRQ]);



    for (i = 0; i < XLNX_ZYNQMP_NUM_QSPI_BUS; i++) {

        gchar *bus_name;

        gchar *target_bus;



        /* Alias controller SPI bus to the SoC itself */

        bus_name = g_strdup_printf("qspi%d", i);

        target_bus = g_strdup_printf("spi%d", i);

        object_property_add_alias(OBJECT(s), bus_name,

                                  OBJECT(&s->qspi), target_bus,

                                  &error_abort);

        g_free(bus_name);

        g_free(target_bus);

    }



    object_property_set_bool(OBJECT(&s->dp), true, "realized", &err);

    if (err) {

        error_propagate(errp, err);

hw/block/m25p80.c

+79 −1
Original line number Diff line number Diff line
@@ -240,6 +240,8 @@ static const FlashPartInfo known_devices[] = { 
    { INFO("n25q128a13",  0x20ba18,      0,  64 << 10, 256, ER_4K) },

    { INFO("n25q256a11",  0x20bb19,      0,  64 << 10, 512, ER_4K) },

    { INFO("n25q256a13",  0x20ba19,      0,  64 << 10, 512, ER_4K) },

    { INFO("n25q512a11",  0x20bb20,      0,  64 << 10, 1024, ER_4K) },

    { INFO("n25q512a13",  0x20ba20,      0,  64 << 10, 1024, ER_4K) },

    { INFO("n25q128",     0x20ba18,      0,  64 << 10, 256, 0) },

    { INFO("n25q256a",    0x20ba19,      0,  64 << 10, 512, ER_4K) },

    { INFO("n25q512a",    0x20ba20,      0,  64 << 10, 1024, ER_4K) },
@@ -331,7 +333,10 @@ typedef enum { 
    WRDI = 0x4,

    RDSR = 0x5,

    WREN = 0x6,

    BRRD = 0x16,

    BRWR = 0x17,

    JEDEC_READ = 0x9f,

    BULK_ERASE_60 = 0x60,

    BULK_ERASE = 0xc7,

    READ_FSR = 0x70,

    RDCR = 0x15,
@@ -355,6 +360,8 @@ typedef enum { 
    DPP = 0xa2,

    QPP = 0x32,

    QPP_4 = 0x34,

    RDID_90 = 0x90,

    RDID_AB = 0xab,



    ERASE_4K = 0x20,

    ERASE4_4K = 0x21,
@@ -405,6 +412,7 @@ typedef enum { 
    MAN_MACRONIX,

    MAN_NUMONYX,

    MAN_WINBOND,

    MAN_SST,

    MAN_GENERIC,

} Manufacturer;
@@ -423,6 +431,7 @@ typedef struct Flash { 
    uint8_t data[M25P80_INTERNAL_DATA_BUFFER_SZ];

    uint32_t len;

    uint32_t pos;

    bool data_read_loop;

    uint8_t needed_bytes;

    uint8_t cmd_in_progress;

    uint32_t cur_addr;
@@ -475,6 +484,8 @@ static inline Manufacturer get_man(Flash *s) 
        return MAN_SPANSION;

    case 0xC2:

        return MAN_MACRONIX;

    case 0xBF:

        return MAN_SST;

    default:

        return MAN_GENERIC;

    }
@@ -698,6 +709,7 @@ static void complete_collecting_data(Flash *s) 
            s->write_enable = false;

        }

        break;

    case BRWR:

    case EXTEND_ADDR_WRITE:

        s->ear = s->data[0];

        break;
@@ -710,6 +722,31 @@ static void complete_collecting_data(Flash *s) 
    case WEVCR:

        s->enh_volatile_cfg = s->data[0];

        break;

    case RDID_90:

    case RDID_AB:

        if (get_man(s) == MAN_SST) {

            if (s->cur_addr <= 1) {

                if (s->cur_addr) {

                    s->data[0] = s->pi->id[2];

                    s->data[1] = s->pi->id[0];

                } else {

                    s->data[0] = s->pi->id[0];

                    s->data[1] = s->pi->id[2];

                }

                s->pos = 0;

                s->len = 2;

                s->data_read_loop = true;

                s->state = STATE_READING_DATA;

            } else {

                qemu_log_mask(LOG_GUEST_ERROR,

                              "M25P80: Invalid read id address\n");

            }

        } else {

            qemu_log_mask(LOG_GUEST_ERROR,

                          "M25P80: Read id (command 0x90/0xAB) is not supported"

                          " by device\n");

        }

        break;

    default:

        break;

    }
@@ -925,6 +962,8 @@ static void decode_new_cmd(Flash *s, uint32_t value) 
    case PP4:

    case PP4_4:

    case DIE_ERASE:

    case RDID_90:

    case RDID_AB:

        s->needed_bytes = get_addr_length(s);

        s->pos = 0;

        s->len = 0;
@@ -983,6 +1022,7 @@ static void decode_new_cmd(Flash *s, uint32_t value) 
        }

        s->pos = 0;

        s->len = 1;

        s->data_read_loop = true;

        s->state = STATE_READING_DATA;

        break;
@@ -993,6 +1033,7 @@ static void decode_new_cmd(Flash *s, uint32_t value) 
        }

        s->pos = 0;

        s->len = 1;

        s->data_read_loop = true;

        s->state = STATE_READING_DATA;

        break;
@@ -1015,6 +1056,7 @@ static void decode_new_cmd(Flash *s, uint32_t value) 
        s->state = STATE_READING_DATA;

        break;



    case BULK_ERASE_60:

    case BULK_ERASE:

        if (s->write_enable) {

            DB_PRINT_L(0, "chip erase\n");
@@ -1032,12 +1074,14 @@ static void decode_new_cmd(Flash *s, uint32_t value) 
    case EX_4BYTE_ADDR:

        s->four_bytes_address_mode = false;

        break;

    case BRRD:

    case EXTEND_ADDR_READ:

        s->data[0] = s->ear;

        s->pos = 0;

        s->len = 1;

        s->state = STATE_READING_DATA;

        break;

    case BRWR:

    case EXTEND_ADDR_WRITE:

        if (s->write_enable) {

            s->needed_bytes = 1;
@@ -1133,6 +1177,7 @@ static int m25p80_cs(SSISlave *ss, bool select) 
        s->pos = 0;

        s->state = STATE_IDLE;

        flash_sync_dirty(s, -1);

        s->data_read_loop = false;

    }



    DB_PRINT_L(0, "%sselect\n", select ? "de" : "");
@@ -1198,8 +1243,10 @@ static uint32_t m25p80_transfer8(SSISlave *ss, uint32_t tx) 
        s->pos++;

        if (s->pos == s->len) {

            s->pos = 0;

            if (!s->data_read_loop) {

                s->state = STATE_IDLE;

            }

        }

        break;



    default:
@@ -1269,11 +1316,38 @@ static Property m25p80_properties[] = { 
    DEFINE_PROP_END_OF_LIST(),

};



static int m25p80_pre_load(void *opaque)

{

    Flash *s = (Flash *)opaque;



    s->data_read_loop = false;

    return 0;

}



static bool m25p80_data_read_loop_needed(void *opaque)

{

    Flash *s = (Flash *)opaque;



    return s->data_read_loop;

}



static const VMStateDescription vmstate_m25p80_data_read_loop = {

    .name = "m25p80/data_read_loop",

    .version_id = 1,

    .minimum_version_id = 1,

    .needed = m25p80_data_read_loop_needed,

    .fields = (VMStateField[]) {

        VMSTATE_BOOL(data_read_loop, Flash),

        VMSTATE_END_OF_LIST()

    }

};



static const VMStateDescription vmstate_m25p80 = {

    .name = "m25p80",

    .version_id = 0,

    .minimum_version_id = 0,

    .pre_save = m25p80_pre_save,

    .pre_load = m25p80_pre_load,

    .fields = (VMStateField[]) {

        VMSTATE_UINT8(state, Flash),

        VMSTATE_UINT8_ARRAY(data, Flash, M25P80_INTERNAL_DATA_BUFFER_SZ),
@@ -1295,6 +1369,10 @@ static const VMStateDescription vmstate_m25p80 = { 
        VMSTATE_UINT8(spansion_cr3nv, Flash),

        VMSTATE_UINT8(spansion_cr4nv, Flash),

        VMSTATE_END_OF_LIST()

    },

    .subsections = (const VMStateDescription * []) {

        &vmstate_m25p80_data_read_loop,

        NULL

    }

};