Commit 5651697f authored by Alex Bennée's avatar Alex Bennée Committed by Peter Maydell
Browse files

target/arm: handle A-profile semihosting at translate time



As for the other semihosting calls we can resolve this at translate
time.

Signed-off-by: default avatarAlex Bennée <alex.bennee@linaro.org>
Reviewed-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Message-id: 20190913151845.12582-4-alex.bennee@linaro.org
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent 376214e4
Loading
Loading
Loading
Loading
+15 −4
Original line number Diff line number Diff line
@@ -10222,14 +10222,25 @@ static bool trans_CBZ(DisasContext *s, arg_CBZ *a)
}

/*
 * Supervisor call
 * Supervisor call - both T32 & A32 come here so we need to check
 * which mode we are in when checking for semihosting.
 */

static bool trans_SVC(DisasContext *s, arg_SVC *a)
{
    const uint32_t semihost_imm = s->thumb ? 0xab : 0x123456;

    if (!arm_dc_feature(s, ARM_FEATURE_M) && semihosting_enabled() &&
#ifndef CONFIG_USER_ONLY
        !IS_USER(s) &&
#endif
        (a->imm == semihost_imm)) {
        gen_exception_internal_insn(s, s->base.pc_next, EXCP_SEMIHOST);
    } else {
        gen_set_pc_im(s, s->base.pc_next);
        s->svc_imm = a->imm;
        s->base.is_jmp = DISAS_SWI;
    }
    return true;
}