Commit 561578c2 authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20150902' into staging 



queued tcg patches

# gpg: Signature made Wed 02 Sep 2015 22:35:37 BST using RSA key ID 4DD0279B
# gpg: Good signature from "Richard Henderson <rth7680@gmail.com>"
# gpg:                 aka "Richard Henderson <rth@redhat.com>"
# gpg:                 aka "Richard Henderson <rth@twiddle.net>"

* remotes/rth/tags/pull-tcg-20150902:
  tcg/i386: omit a few REXW prefixes in softmmu code
  tcg/aarch64: Fix tcg_out_qemu_{ld, st} for guest_base == 0

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents fc8135a4 08b0b23b

tcg/aarch64/tcg-target.c

+20 −7
Original line number Diff line number Diff line
@@ -56,6 +56,11 @@ static const int tcg_target_call_oarg_regs[1] = { 
#define TCG_REG_TMP TCG_REG_X30



#ifndef CONFIG_SOFTMMU

/* Note that XZR cannot be encoded in the address base register slot,

   as that actaully encodes SP.  So if we need to zero-extend the guest

   address, via the address index register slot, we need to load even

   a zero guest base into a register.  */

#define USE_GUEST_BASE     (guest_base != 0 || TARGET_LONG_BITS == 32)

#define TCG_REG_GUEST_BASE TCG_REG_X28

#endif
@@ -1224,9 +1229,13 @@ static void tcg_out_qemu_ld(TCGContext *s, TCGReg data_reg, TCGReg addr_reg, 
    add_qemu_ldst_label(s, true, oi, ext, data_reg, addr_reg,

                        s->code_ptr, label_ptr);

#else /* !CONFIG_SOFTMMU */

    if (USE_GUEST_BASE) {

        tcg_out_qemu_ld_direct(s, memop, ext, data_reg,

                           guest_base ? TCG_REG_GUEST_BASE : TCG_REG_XZR,

                           otype, addr_reg);

                               TCG_REG_GUEST_BASE, otype, addr_reg);

    } else {

        tcg_out_qemu_ld_direct(s, memop, ext, data_reg,

                               addr_reg, TCG_TYPE_I64, TCG_REG_XZR);

    }

#endif /* CONFIG_SOFTMMU */

}
@@ -1245,9 +1254,13 @@ static void tcg_out_qemu_st(TCGContext *s, TCGReg data_reg, TCGReg addr_reg, 
    add_qemu_ldst_label(s, false, oi, (memop & MO_SIZE)== MO_64,

                        data_reg, addr_reg, s->code_ptr, label_ptr);

#else /* !CONFIG_SOFTMMU */

    if (USE_GUEST_BASE) {

        tcg_out_qemu_st_direct(s, memop, data_reg,

                           guest_base ? TCG_REG_GUEST_BASE : TCG_REG_XZR,

                           otype, addr_reg);

                               TCG_REG_GUEST_BASE, otype, addr_reg);

    } else {

        tcg_out_qemu_st_direct(s, memop, data_reg,

                               addr_reg, TCG_TYPE_I64, TCG_REG_XZR);

    }

#endif /* CONFIG_SOFTMMU */

}
@@ -1806,7 +1819,7 @@ static void tcg_target_qemu_prologue(TCGContext *s) 
                  CPU_TEMP_BUF_NLONGS * sizeof(long));



#if !defined(CONFIG_SOFTMMU)

    if (guest_base) {

    if (USE_GUEST_BASE) {

        tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_GUEST_BASE, guest_base);

        tcg_regset_set_reg(s->reserved_regs, TCG_REG_GUEST_BASE);

    }

tcg/i386/tcg-target.c

+9 −6
Original line number Diff line number Diff line
@@ -1178,8 +1178,8 @@ static inline void tcg_out_tlb_load(TCGContext *s, TCGReg addrlo, TCGReg addrhi, 
    const TCGReg r0 = TCG_REG_L0;

    const TCGReg r1 = TCG_REG_L1;

    TCGType ttype = TCG_TYPE_I32;

    TCGType htype = TCG_TYPE_I32;

    int trexw = 0, hrexw = 0;

    TCGType tlbtype = TCG_TYPE_I32;

    int trexw = 0, hrexw = 0, tlbrexw = 0;

    int s_mask = (1 << (opc & MO_SIZE)) - 1;

    bool aligned = (opc & MO_AMASK) == MO_ALIGN || s_mask == 0;
@@ -1189,12 +1189,15 @@ static inline void tcg_out_tlb_load(TCGContext *s, TCGReg addrlo, TCGReg addrhi, 
            trexw = P_REXW;

        }

        if (TCG_TYPE_PTR == TCG_TYPE_I64) {

            htype = TCG_TYPE_I64;

            hrexw = P_REXW;

            if (TARGET_PAGE_BITS + CPU_TLB_BITS > 32) {

                tlbtype = TCG_TYPE_I64;

                tlbrexw = P_REXW;

            }

        }

    }



    tcg_out_mov(s, htype, r0, addrlo);

    tcg_out_mov(s, tlbtype, r0, addrlo);

    if (aligned) {

        tcg_out_mov(s, ttype, r1, addrlo);

    } else {
@@ -1203,12 +1206,12 @@ static inline void tcg_out_tlb_load(TCGContext *s, TCGReg addrlo, TCGReg addrhi, 
        tcg_out_modrm_offset(s, OPC_LEA + trexw, r1, addrlo, s_mask);

    }



    tcg_out_shifti(s, SHIFT_SHR + hrexw, r0,

    tcg_out_shifti(s, SHIFT_SHR + tlbrexw, r0,

                   TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS);



    tgen_arithi(s, ARITH_AND + trexw, r1,

                TARGET_PAGE_MASK | (aligned ? s_mask : 0), 0);

    tgen_arithi(s, ARITH_AND + hrexw, r0,

    tgen_arithi(s, ARITH_AND + tlbrexw, r0,

                (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS, 0);



    tcg_out_modrm_sib_offset(s, OPC_LEA + hrexw, r0, TCG_AREG0, r0, 0,