Commit 55e5c285 authored by Andreas Färber's avatar Andreas Färber
Browse files

cpu: Move cpu_index field to CPUState 



Note that target-alpha accesses this field from TCG, now using a
negative offset. Therefore the field is placed last in CPUState.

Pass PowerPCCPU to [kvm]ppc_fixup_cpu() to facilitate this change.

Move common parts of mips cpu_state_reset() to mips_cpu_reset().

Acked-by: Richard Henderson <rth@twiddle.net> (for alpha)
[AF: Rebased onto ppc CPU subclasses and openpic changes]
Signed-off-by: default avatarAndreas Färber <afaerber@suse.de>
parent 1b1ed8dc

cpus.c

+9 −5
Original line number Diff line number Diff line
@@ -390,13 +390,15 @@ void hw_error(const char *fmt, ...) 
{

    va_list ap;

    CPUArchState *env;

    CPUState *cpu;



    va_start(ap, fmt);

    fprintf(stderr, "qemu: hardware error: ");

    vfprintf(stderr, fmt, ap);

    fprintf(stderr, "\n");

    for (env = first_cpu; env != NULL; env = env->next_cpu) {

        fprintf(stderr, "CPU #%d:\n", env->cpu_index);

        cpu = ENV_GET_CPU(env);

        fprintf(stderr, "CPU #%d:\n", cpu->cpu_index);

        cpu_dump_state(env, stderr, fprintf, CPU_DUMP_FPU);

    }

    va_end(ap);
@@ -1166,7 +1168,7 @@ void set_numa_modes(void) 
    for (env = first_cpu; env != NULL; env = env->next_cpu) {

        cpu = ENV_GET_CPU(env);

        for (i = 0; i < nb_numa_nodes; i++) {

            if (test_bit(env->cpu_index, node_cpumask[i])) {

            if (test_bit(cpu->cpu_index, node_cpumask[i])) {

                cpu->numa_node = i;

            }

        }
@@ -1215,7 +1217,7 @@ CpuInfoList *qmp_query_cpus(Error **errp) 


        info = g_malloc0(sizeof(*info));

        info->value = g_malloc0(sizeof(*info->value));

        info->value->CPU = env->cpu_index;

        info->value->CPU = cpu->cpu_index;

        info->value->current = (env == first_cpu);

        info->value->halted = env->halted;

        info->value->thread_id = cpu->thread_id;
@@ -1253,6 +1255,7 @@ void qmp_memsave(int64_t addr, int64_t size, const char *filename, 
    FILE *f;

    uint32_t l;

    CPUArchState *env;

    CPUState *cpu;

    uint8_t buf[1024];



    if (!has_cpu) {
@@ -1260,7 +1263,8 @@ void qmp_memsave(int64_t addr, int64_t size, const char *filename, 
    }



    for (env = first_cpu; env; env = env->next_cpu) {

        if (cpu_index == env->cpu_index) {

        cpu = ENV_GET_CPU(env);

        if (cpu_index == cpu->cpu_index) {

            break;

        }

    }

exec.c

+7 −6
Original line number Diff line number Diff line
@@ -247,13 +247,16 @@ static const VMStateDescription vmstate_cpu_common = { 
};

#endif



CPUArchState *qemu_get_cpu(int cpu)

CPUArchState *qemu_get_cpu(int index)

{

    CPUArchState *env = first_cpu;

    CPUState *cpu;



    while (env) {

        if (env->cpu_index == cpu)

        cpu = ENV_GET_CPU(env);

        if (cpu->cpu_index == index) {

            break;

        }

        env = env->next_cpu;

    }
@@ -276,7 +279,7 @@ void cpu_exec_init(CPUArchState *env) 
        penv = &(*penv)->next_cpu;

        cpu_index++;

    }

    env->cpu_index = cpu_index;

    cpu->cpu_index = cpu_index;

    cpu->numa_node = 0;

    QTAILQ_INIT(&env->breakpoints);

    QTAILQ_INIT(&env->watchpoints);
@@ -529,7 +532,6 @@ CPUArchState *cpu_copy(CPUArchState *env) 
{

    CPUArchState *new_env = cpu_init(env->cpu_model_str);

    CPUArchState *next_cpu = new_env->next_cpu;

    int cpu_index = new_env->cpu_index;

#if defined(TARGET_HAS_ICE)

    CPUBreakpoint *bp;

    CPUWatchpoint *wp;
@@ -537,9 +539,8 @@ CPUArchState *cpu_copy(CPUArchState *env) 


    memcpy(new_env, env, sizeof(CPUArchState));



    /* Preserve chaining and index. */

    /* Preserve chaining. */

    new_env->next_cpu = next_cpu;

    new_env->cpu_index = cpu_index;



    /* Clone all break/watchpoints.

       Note: Once we support ptrace with hw-debug register access, make sure

gdbstub.c

+2 −1
Original line number Diff line number Diff line
@@ -2401,9 +2401,10 @@ static int gdb_handle_packet(GDBState *s, const char *line_buf) 
            thread = strtoull(p+16, (char **)&p, 16);

            env = find_cpu(thread);

            if (env != NULL) {

                CPUState *cpu = ENV_GET_CPU(env);

                cpu_synchronize_state(env);

                len = snprintf((char *)mem_buf, sizeof(mem_buf),

                               "CPU#%d [%s]", env->cpu_index,

                               "CPU#%d [%s]", cpu->cpu_index,

                               env->halted ? "halted " : "running");

                memtohex(buf, mem_buf, len);

                put_packet(s, buf);

hw/alpha_typhoon.c

+3 −1
Original line number Diff line number Diff line
@@ -75,6 +75,7 @@ static uint64_t cchip_read(void *opaque, hwaddr addr, unsigned size) 
{

    CPUAlphaState *env = cpu_single_env;

    TyphoonState *s = opaque;

    CPUState *cpu;

    uint64_t ret = 0;



    if (addr & 4) {
@@ -95,7 +96,8 @@ static uint64_t cchip_read(void *opaque, hwaddr addr, unsigned size) 


    case 0x0080:

        /* MISC: Miscellaneous Register.  */

        ret = s->cchip.misc | (env->cpu_index & 3);

        cpu = ENV_GET_CPU(env);

        ret = s->cchip.misc | (cpu->cpu_index & 3);

        break;



    case 0x00c0:

hw/arm_gic.c

+2 −1
Original line number Diff line number Diff line
@@ -39,7 +39,8 @@ static const uint8_t gic_id[] = { 
static inline int gic_get_current_cpu(GICState *s)

{

    if (s->num_cpu > 1) {

        return cpu_single_env->cpu_index;

        CPUState *cpu = ENV_GET_CPU(cpu_single_env);

        return cpu->cpu_index;

    }

    return 0;

}