Commit 55a2201e authored by Yongbok Kim's avatar Yongbok Kim Committed by Leon Alrae
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target-mips: add MSA support to mips32r5-generic



add MSA support to mips32r5-generic core definition

Signed-off-by: default avatarYongbok Kim <yongbok.kim@imgtec.com>
Reviewed-by: default avatarLeon Alrae <leon.alrae@imgtec.com>
Signed-off-by: default avatarLeon Alrae <leon.alrae@imgtec.com>
parent ed8a933f
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+2 −2
Original line number Diff line number Diff line
@@ -358,7 +358,7 @@ static const mips_def_t mips_defs[] =
                       (0 << CP0C1_DS) | (3 << CP0C1_DL) | (1 << CP0C1_DA) |
                       (1 << CP0C1_CA),
        .CP0_Config2 = MIPS_CONFIG2,
        .CP0_Config3 = MIPS_CONFIG3 | (1U << CP0C3_M),
        .CP0_Config3 = MIPS_CONFIG3 | (1U << CP0C3_M) | (1 << CP0C3_MSAP),
        .CP0_Config4 = MIPS_CONFIG4 | (1U << CP0C4_M),
        .CP0_Config4_rw_bitmask = 0,
        .CP0_Config5 = MIPS_CONFIG5 | (1 << CP0C5_UFR),
@@ -376,7 +376,7 @@ static const mips_def_t mips_defs[] =
                    (0x93 << FCR0_PRID),
        .SEGBITS = 32,
        .PABITS = 32,
        .insn_flags = CPU_MIPS32R5 | ASE_MIPS16 | ASE_DSP | ASE_DSPR2,
        .insn_flags = CPU_MIPS32R5 | ASE_MIPS16 | ASE_DSP | ASE_DSPR2 | ASE_MSA,
        .mmu_type = MMU_TYPE_R4000,
    },
#if defined(TARGET_MIPS64)