Commit 540a8f34 authored by Alistair Francis's avatar Alistair Francis Committed by Peter Maydell
Browse files

STM32F205: Connect the SPI devices 



Connect the SPI devices to the STM32F205 SoC.

Signed-off-by: default avatarAlistair Francis <alistair@alistair23.me>
Reviewed-by: default avatarPeter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: d05849120420f8db0d9aa053bd23134c33cd9180.1474742262.git.alistair@alistair23.me
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent b63041c8

hw/arm/stm32f205_soc.c

+22 −0
Original line number Diff line number Diff line
@@ -36,10 +36,13 @@ static const uint32_t usart_addr[STM_NUM_USARTS] = { 0x40011000, 0x40004400, 
    0x40004800, 0x40004C00, 0x40005000, 0x40011400 };

static const uint32_t adc_addr[STM_NUM_ADCS] = { 0x40012000, 0x40012100,

    0x40012200 };

static const uint32_t spi_addr[STM_NUM_SPIS] = { 0x40013000, 0x40003800,

    0x40003C00 };



static const int timer_irq[STM_NUM_TIMERS] = {28, 29, 30, 50};

static const int usart_irq[STM_NUM_USARTS] = {37, 38, 39, 52, 53, 71};

#define ADC_IRQ 18

static const int spi_irq[STM_NUM_SPIS] = {35, 36, 51};



static void stm32f205_soc_initfn(Object *obj)

{
@@ -68,6 +71,12 @@ static void stm32f205_soc_initfn(Object *obj) 
                          TYPE_STM32F2XX_ADC);

        qdev_set_parent_bus(DEVICE(&s->adc[i]), sysbus_get_default());

    }



    for (i = 0; i < STM_NUM_SPIS; i++) {

        object_initialize(&s->spi[i], sizeof(s->spi[i]),

                          TYPE_STM32F2XX_SPI);

        qdev_set_parent_bus(DEVICE(&s->spi[i]), sysbus_get_default());

    }

}



static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp)
@@ -167,6 +176,19 @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp) 
        sysbus_connect_irq(busdev, 0,

                           qdev_get_gpio_in(DEVICE(s->adc_irqs), i));

    }



    /* SPI 1 and 2 */

    for (i = 0; i < STM_NUM_SPIS; i++) {

        dev = DEVICE(&(s->spi[i]));

        object_property_set_bool(OBJECT(&s->spi[i]), true, "realized", &err);

        if (err != NULL) {

            error_propagate(errp, err);

            return;

        }

        busdev = SYS_BUS_DEVICE(dev);

        sysbus_mmio_map(busdev, 0, spi_addr[i]);

        sysbus_connect_irq(busdev, 0, qdev_get_gpio_in(nvic, spi_irq[i]));

    }

}



static Property stm32f205_soc_properties[] = {

include/hw/arm/stm32f205_soc.h

+3 −0
Original line number Diff line number Diff line
@@ -30,6 +30,7 @@ 
#include "hw/char/stm32f2xx_usart.h"

#include "hw/adc/stm32f2xx_adc.h"

#include "hw/or-irq.h"

#include "hw/ssi/stm32f2xx_spi.h"



#define TYPE_STM32F205_SOC "stm32f205-soc"

#define STM32F205_SOC(obj) \
@@ -38,6 +39,7 @@ 
#define STM_NUM_USARTS 6

#define STM_NUM_TIMERS 4

#define STM_NUM_ADCS 3

#define STM_NUM_SPIS 3



#define FLASH_BASE_ADDRESS 0x08000000

#define FLASH_SIZE (1024 * 1024)
@@ -56,6 +58,7 @@ typedef struct STM32F205State { 
    STM32F2XXUsartState usart[STM_NUM_USARTS];

    STM32F2XXTimerState timer[STM_NUM_TIMERS];

    STM32F2XXADCState adc[STM_NUM_ADCS];

    STM32F2XXSPIState spi[STM_NUM_SPIS];



    qemu_or_irq *adc_irqs;

} STM32F205State;