Commit 53a4e5c5 authored by Peter Maydell's avatar Peter Maydell
Browse files

target/arm: Convert get_phys_addr_pmsav5() to not return FSC values 



Make get_phys_addr_pmsav5() return a fault type in the ARMMMUFaultInfo
structure, which we convert to the FSC at the callsite.

Note that PMSAv5 does not define any guest-visible fault status
register, so the different "fsr" values we were previously
returning are entirely arbitrary. So we can just switch to using
the most appropriae fi->type values without worrying that we
need to special-case FaultInfo->FSC conversion for PMSAv5.

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Reviewed-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Reviewed-by: default avatarEdgar E. Iglesias <edgar.iglesias@xilinx.com>
Tested-by: default avatarStefano Stabellini <sstabellini@kernel.org>
Message-id: 1512503192-2239-7-git-send-email-peter.maydell@linaro.org
parent da909b2c

target/arm/helper.c

+13 −7
Original line number Diff line number Diff line
@@ -9544,7 +9544,8 @@ static bool get_phys_addr_pmsav8(CPUARMState *env, uint32_t address, 


static bool get_phys_addr_pmsav5(CPUARMState *env, uint32_t address,

                                 MMUAccessType access_type, ARMMMUIdx mmu_idx,

                                 hwaddr *phys_ptr, int *prot, uint32_t *fsr)

                                 hwaddr *phys_ptr, int *prot,

                                 ARMMMUFaultInfo *fi)

{

    int n;

    uint32_t mask;
@@ -9573,7 +9574,7 @@ static bool get_phys_addr_pmsav5(CPUARMState *env, uint32_t address, 
        }

    }

    if (n < 0) {

        *fsr = 2;

        fi->type = ARMFault_Background;

        return true;

    }
@@ -9585,11 +9586,13 @@ static bool get_phys_addr_pmsav5(CPUARMState *env, uint32_t address, 
    mask = (mask >> (n * 4)) & 0xf;

    switch (mask) {

    case 0:

        *fsr = 1;

        fi->type = ARMFault_Permission;

        fi->level = 1;

        return true;

    case 1:

        if (is_user) {

            *fsr = 1;

            fi->type = ARMFault_Permission;

            fi->level = 1;

            return true;

        }

        *prot = PAGE_READ | PAGE_WRITE;
@@ -9605,7 +9608,8 @@ static bool get_phys_addr_pmsav5(CPUARMState *env, uint32_t address, 
        break;

    case 5:

        if (is_user) {

            *fsr = 1;

            fi->type = ARMFault_Permission;

            fi->level = 1;

            return true;

        }

        *prot = PAGE_READ;
@@ -9615,7 +9619,8 @@ static bool get_phys_addr_pmsav5(CPUARMState *env, uint32_t address, 
        break;

    default:

        /* Bad permission.  */

        *fsr = 1;

        fi->type = ARMFault_Permission;

        fi->level = 1;

        return true;

    }

    *prot |= PAGE_EXEC;
@@ -9820,7 +9825,8 @@ static bool get_phys_addr(CPUARMState *env, target_ulong address, 
        } else {

            /* Pre-v7 MPU */

            ret = get_phys_addr_pmsav5(env, address, access_type, mmu_idx,

                                       phys_ptr, prot, fsr);

                                       phys_ptr, prot, fi);

            *fsr = arm_fi_to_sfsc(fi);

        }

        qemu_log_mask(CPU_LOG_MMU, "PMSA MPU lookup for %s at 0x%08" PRIx32

                      " mmu_idx %u -> %s (prot %c%c%c)\n",