Commit 5153bb89 authored by Edgar E. Iglesias's avatar Edgar E. Iglesias
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target-microblaze: Fix trap checks for FPU insns 



Fix trap checks for FPU insns when extended FPU insns are enabled.

Reviewed-by: default avatarAlistair Francis <alistair.francis@wdc.com>
Reviewed-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Signed-off-by: default avatarEdgar E. Iglesias <edgar.iglesias@xilinx.com>
parent 59b1a90b

target/microblaze/translate.c

+1 −1
Original line number Diff line number Diff line
@@ -1412,7 +1412,7 @@ static void dec_fpu(DisasContext *dc) 


    if ((dc->tb_flags & MSR_EE_FLAG)

          && (dc->cpu->env.pvr.regs[2] & PVR2_ILL_OPCODE_EXC_MASK)

          && (dc->cpu->cfg.use_fpu != 1)) {

          && !dc->cpu->cfg.use_fpu) {

        tcg_gen_movi_tl(cpu_SR[SR_ESR], ESR_EC_ILLEGAL_OP);

        t_gen_raise_exception(dc, EXCP_HW_EXCP);

        return;