Commit 5087abfb authored by Richard Henderson's avatar Richard Henderson
Browse files

tcg: Add tcg_gen_mulsu2_{i32,i64,tl} 



This multiply has one signed input and one unsigned input,
producing the full double-width result.

Signed-off-by: default avatarRichard Henderson <rth@twiddle.net>
Message-Id: <1475011433-24456-2-git-send-email-rth@twiddle.net>
parent 1ee73216

tcg/tcg-op.c

+43 −0
Original line number Diff line number Diff line
@@ -678,6 +678,33 @@ void tcg_gen_muls2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2) 
    }

}



void tcg_gen_mulsu2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2)

{

    if (TCG_TARGET_REG_BITS == 32) {

        TCGv_i32 t0 = tcg_temp_new_i32();

        TCGv_i32 t1 = tcg_temp_new_i32();

        TCGv_i32 t2 = tcg_temp_new_i32();

        tcg_gen_mulu2_i32(t0, t1, arg1, arg2);

        /* Adjust for negative input for the signed arg1.  */

        tcg_gen_sari_i32(t2, arg1, 31);

        tcg_gen_and_i32(t2, t2, arg2);

        tcg_gen_sub_i32(rh, t1, t2);

        tcg_gen_mov_i32(rl, t0);

        tcg_temp_free_i32(t0);

        tcg_temp_free_i32(t1);

        tcg_temp_free_i32(t2);

    } else {

        TCGv_i64 t0 = tcg_temp_new_i64();

        TCGv_i64 t1 = tcg_temp_new_i64();

        tcg_gen_ext_i32_i64(t0, arg1);

        tcg_gen_extu_i32_i64(t1, arg2);

        tcg_gen_mul_i64(t0, t0, t1);

        tcg_gen_extr_i64_i32(rl, rh, t0);

        tcg_temp_free_i64(t0);

        tcg_temp_free_i64(t1);

    }

}



void tcg_gen_ext8s_i32(TCGv_i32 ret, TCGv_i32 arg)

{

    if (TCG_TARGET_HAS_ext8s_i32) {
@@ -1748,6 +1775,22 @@ void tcg_gen_muls2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2) 
    }

}



void tcg_gen_mulsu2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2)

{

    TCGv_i64 t0 = tcg_temp_new_i64();

    TCGv_i64 t1 = tcg_temp_new_i64();

    TCGv_i64 t2 = tcg_temp_new_i64();

    tcg_gen_mulu2_i64(t0, t1, arg1, arg2);

    /* Adjust for negative input for the signed arg1.  */

    tcg_gen_sari_i64(t2, arg1, 63);

    tcg_gen_and_i64(t2, t2, arg2);

    tcg_gen_sub_i64(rh, t1, t2);

    tcg_gen_mov_i64(rl, t0);

    tcg_temp_free_i64(t0);

    tcg_temp_free_i64(t1);

    tcg_temp_free_i64(t2);

}



/* Size changing operations.  */



void tcg_gen_extrl_i64_i32(TCGv_i32 ret, TCGv_i64 arg)

tcg/tcg-op.h

+4 −0
Original line number Diff line number Diff line
@@ -306,6 +306,7 @@ void tcg_gen_sub2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al, 
                      TCGv_i32 ah, TCGv_i32 bl, TCGv_i32 bh);

void tcg_gen_mulu2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);

void tcg_gen_muls2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);

void tcg_gen_mulsu2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);

void tcg_gen_ext8s_i32(TCGv_i32 ret, TCGv_i32 arg);

void tcg_gen_ext16s_i32(TCGv_i32 ret, TCGv_i32 arg);

void tcg_gen_ext8u_i32(TCGv_i32 ret, TCGv_i32 arg);
@@ -482,6 +483,7 @@ void tcg_gen_sub2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al, 
                      TCGv_i64 ah, TCGv_i64 bl, TCGv_i64 bh);

void tcg_gen_mulu2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);

void tcg_gen_muls2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);

void tcg_gen_mulsu2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);

void tcg_gen_not_i64(TCGv_i64 ret, TCGv_i64 arg);

void tcg_gen_ext8s_i64(TCGv_i64 ret, TCGv_i64 arg);

void tcg_gen_ext16s_i64(TCGv_i64 ret, TCGv_i64 arg);
@@ -956,6 +958,7 @@ void tcg_gen_atomic_xor_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp); 
#define tcg_gen_sub2_tl tcg_gen_sub2_i64

#define tcg_gen_mulu2_tl tcg_gen_mulu2_i64

#define tcg_gen_muls2_tl tcg_gen_muls2_i64

#define tcg_gen_mulsu2_tl tcg_gen_mulsu2_i64

#define tcg_gen_atomic_cmpxchg_tl tcg_gen_atomic_cmpxchg_i64

#define tcg_gen_atomic_xchg_tl tcg_gen_atomic_xchg_i64

#define tcg_gen_atomic_fetch_add_tl tcg_gen_atomic_fetch_add_i64
@@ -1043,6 +1046,7 @@ void tcg_gen_atomic_xor_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp); 
#define tcg_gen_sub2_tl tcg_gen_sub2_i32

#define tcg_gen_mulu2_tl tcg_gen_mulu2_i32

#define tcg_gen_muls2_tl tcg_gen_muls2_i32

#define tcg_gen_mulsu2_tl tcg_gen_mulsu2_i32

#define tcg_gen_atomic_cmpxchg_tl tcg_gen_atomic_cmpxchg_i32

#define tcg_gen_atomic_xchg_tl tcg_gen_atomic_xchg_i32

#define tcg_gen_atomic_fetch_add_tl tcg_gen_atomic_fetch_add_i32