Commit 5007c904 authored by Peter Maydell's avatar Peter Maydell
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hw/arm/armsse: Fix miswiring of expansion IRQs 



In commit 91c1e9fc where we added dual-CPU support to
the ARMSSE, we set up the wiring of the expansion IRQs via nested
loops: the outer loop on 'i' loops for each CPU, and the inner loop
on 'j' loops for each interrupt. Fix a typo which meant we were
wiring every expansion IRQ line to external IRQ 0 on CPU 0 and
to external IRQ 1 on CPU 1.

Fixes: 91c1e9fc ("hw/arm/armsse: Support dual-CPU configuration")
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Reviewed-by: default avatarPhilippe Mathieu-Daudé <philmd@redhat.com>
parent 935fe442

hw/arm/armsse.c

+1 −1
Original line number Diff line number Diff line
@@ -565,7 +565,7 @@ static void armsse_realize(DeviceState *dev, Error **errp) 
        /* Connect EXP_IRQ/EXP_CPUn_IRQ GPIOs to the NVIC's lines 32 and up */

        s->exp_irqs[i] = g_new(qemu_irq, s->exp_numirq);

        for (j = 0; j < s->exp_numirq; j++) {

            s->exp_irqs[i][j] = qdev_get_gpio_in(cpudev, i + 32);

            s->exp_irqs[i][j] = qdev_get_gpio_in(cpudev, j + 32);

        }

        if (i == 0) {

            gpioname = g_strdup("EXP_IRQ");