Commit 5005e253 authored by Emilio G. Cota's avatar Emilio G. Cota Committed by Richard Henderson
Browse files

exec: introduce tlb_init 



Paves the way for the addition of a per-TLB lock.

Reviewed-by: default avatarAlex Bennée <alex.bennee@linaro.org>
Reviewed-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Signed-off-by: default avatarEmilio G. Cota <cota@braap.org>
Message-Id: <20181009174557.16125-4-cota@braap.org>
Signed-off-by: default avatarRichard Henderson <richard.henderson@linaro.org>
parent 022d6378

accel/tcg/cputlb.c

+4 −0
Original line number Diff line number Diff line
@@ -73,6 +73,10 @@ QEMU_BUILD_BUG_ON(sizeof(target_ulong) > sizeof(run_on_cpu_data)); 
QEMU_BUILD_BUG_ON(NB_MMU_MODES > 16);

#define ALL_MMUIDX_BITS ((1 << NB_MMU_MODES) - 1)



void tlb_init(CPUState *cpu)

{

}



/* flush_all_helper: run fn across all cpus

 *

 * If the wait flag is set then the src cpu's helper will be queued as

exec.c

+1 −0
Original line number Diff line number Diff line
@@ -965,6 +965,7 @@ void cpu_exec_realizefn(CPUState *cpu, Error **errp) 
        tcg_target_initialized = true;

        cc->tcg_initialize();

    }

    tlb_init(cpu);



#ifndef CONFIG_USER_ONLY

    if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {

include/exec/exec-all.h

+8 −0
Original line number Diff line number Diff line
@@ -99,6 +99,11 @@ void cpu_address_space_init(CPUState *cpu, int asidx, 


#if !defined(CONFIG_USER_ONLY) && defined(CONFIG_TCG)

/* cputlb.c */

/**

 * tlb_init - initialize a CPU's TLB

 * @cpu: CPU whose TLB should be initialized

 */

void tlb_init(CPUState *cpu);

/**

 * tlb_flush_page:

 * @cpu: CPU whose TLB should be flushed
@@ -258,6 +263,9 @@ void tlb_set_page(CPUState *cpu, target_ulong vaddr, 
void probe_write(CPUArchState *env, target_ulong addr, int size, int mmu_idx,

                 uintptr_t retaddr);

#else

static inline void tlb_init(CPUState *cpu)

{

}

static inline void tlb_flush_page(CPUState *cpu, target_ulong addr)

{

}