Loading target/ppc/fpu_helper.c +20 −23 Original line number Diff line number Diff line Loading @@ -689,6 +689,17 @@ float64 helper_fsub(CPUPPCState *env, float64 arg1, float64 arg2) return ret; } static void float_invalid_op_mul(CPUPPCState *env, bool set_fprc, uintptr_t retaddr, int classes) { if ((classes & (is_zero | is_inf)) == (is_zero | is_inf)) { /* Multiplication of zero by infinity */ float_invalid_op_vximz(env, set_fprc, retaddr); } else if (classes & is_snan) { float_invalid_op_vxsnan(env, retaddr); } } /* fmul - fmul. */ float64 helper_fmul(CPUPPCState *env, float64 arg1, float64 arg2) { Loading @@ -696,15 +707,9 @@ float64 helper_fmul(CPUPPCState *env, float64 arg1, float64 arg2) int status = get_float_exception_flags(&env->fp_status); if (unlikely(status & float_flag_invalid)) { if ((float64_is_infinity(arg1) && float64_is_zero(arg2)) || (float64_is_zero(arg1) && float64_is_infinity(arg2))) { /* Multiplication of zero by infinity */ float_invalid_op_vximz(env, 1, GETPC()); } else if (float64_is_signaling_nan(arg1, &env->fp_status) || float64_is_signaling_nan(arg2, &env->fp_status)) { /* sNaN multiplication */ float_invalid_op_vxsnan(env, GETPC()); } float_invalid_op_mul(env, 1, GETPC(), float64_classify(arg1) | float64_classify(arg2)); } return ret; Loading Loading @@ -1886,13 +1891,9 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \ env->fp_status.float_exception_flags |= tstat.float_exception_flags; \ \ if (unlikely(tstat.float_exception_flags & float_flag_invalid)) { \ if ((tp##_is_infinity(xa.fld) && tp##_is_zero(xb.fld)) || \ (tp##_is_infinity(xb.fld) && tp##_is_zero(xa.fld))) { \ float_invalid_op_vximz(env, sfprf, GETPC()); \ } else if (tp##_is_signaling_nan(xa.fld, &tstat) || \ tp##_is_signaling_nan(xb.fld, &tstat)) { \ float_invalid_op_vxsnan(env, GETPC()); \ } \ float_invalid_op_mul(env, sfprf, GETPC(), \ tp##_classify(xa.fld) | \ tp##_classify(xb.fld)); \ } \ \ if (r2sp) { \ Loading Loading @@ -1933,13 +1934,9 @@ void helper_xsmulqp(CPUPPCState *env, uint32_t opcode) env->fp_status.float_exception_flags |= tstat.float_exception_flags; if (unlikely(tstat.float_exception_flags & float_flag_invalid)) { if ((float128_is_infinity(xa.f128) && float128_is_zero(xb.f128)) || (float128_is_infinity(xb.f128) && float128_is_zero(xa.f128))) { float_invalid_op_vximz(env, 1, GETPC()); } else if (float128_is_signaling_nan(xa.f128, &tstat) || float128_is_signaling_nan(xb.f128, &tstat)) { float_invalid_op_vxsnan(env, GETPC()); } float_invalid_op_mul(env, 1, GETPC(), float128_classify(xa.f128) | float128_classify(xb.f128)); } helper_compute_fprf_float128(env, xt.f128); Loading Loading
target/ppc/fpu_helper.c +20 −23 Original line number Diff line number Diff line Loading @@ -689,6 +689,17 @@ float64 helper_fsub(CPUPPCState *env, float64 arg1, float64 arg2) return ret; } static void float_invalid_op_mul(CPUPPCState *env, bool set_fprc, uintptr_t retaddr, int classes) { if ((classes & (is_zero | is_inf)) == (is_zero | is_inf)) { /* Multiplication of zero by infinity */ float_invalid_op_vximz(env, set_fprc, retaddr); } else if (classes & is_snan) { float_invalid_op_vxsnan(env, retaddr); } } /* fmul - fmul. */ float64 helper_fmul(CPUPPCState *env, float64 arg1, float64 arg2) { Loading @@ -696,15 +707,9 @@ float64 helper_fmul(CPUPPCState *env, float64 arg1, float64 arg2) int status = get_float_exception_flags(&env->fp_status); if (unlikely(status & float_flag_invalid)) { if ((float64_is_infinity(arg1) && float64_is_zero(arg2)) || (float64_is_zero(arg1) && float64_is_infinity(arg2))) { /* Multiplication of zero by infinity */ float_invalid_op_vximz(env, 1, GETPC()); } else if (float64_is_signaling_nan(arg1, &env->fp_status) || float64_is_signaling_nan(arg2, &env->fp_status)) { /* sNaN multiplication */ float_invalid_op_vxsnan(env, GETPC()); } float_invalid_op_mul(env, 1, GETPC(), float64_classify(arg1) | float64_classify(arg2)); } return ret; Loading Loading @@ -1886,13 +1891,9 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \ env->fp_status.float_exception_flags |= tstat.float_exception_flags; \ \ if (unlikely(tstat.float_exception_flags & float_flag_invalid)) { \ if ((tp##_is_infinity(xa.fld) && tp##_is_zero(xb.fld)) || \ (tp##_is_infinity(xb.fld) && tp##_is_zero(xa.fld))) { \ float_invalid_op_vximz(env, sfprf, GETPC()); \ } else if (tp##_is_signaling_nan(xa.fld, &tstat) || \ tp##_is_signaling_nan(xb.fld, &tstat)) { \ float_invalid_op_vxsnan(env, GETPC()); \ } \ float_invalid_op_mul(env, sfprf, GETPC(), \ tp##_classify(xa.fld) | \ tp##_classify(xb.fld)); \ } \ \ if (r2sp) { \ Loading Loading @@ -1933,13 +1934,9 @@ void helper_xsmulqp(CPUPPCState *env, uint32_t opcode) env->fp_status.float_exception_flags |= tstat.float_exception_flags; if (unlikely(tstat.float_exception_flags & float_flag_invalid)) { if ((float128_is_infinity(xa.f128) && float128_is_zero(xb.f128)) || (float128_is_infinity(xb.f128) && float128_is_zero(xa.f128))) { float_invalid_op_vximz(env, 1, GETPC()); } else if (float128_is_signaling_nan(xa.f128, &tstat) || float128_is_signaling_nan(xb.f128, &tstat)) { float_invalid_op_vxsnan(env, GETPC()); } float_invalid_op_mul(env, 1, GETPC(), float128_classify(xa.f128) | float128_classify(xb.f128)); } helper_compute_fprf_float128(env, xt.f128); Loading