Commit 48880da6 authored by Paolo Bonzini's avatar Paolo Bonzini
Browse files

ppc: cleanup logging



Avoid "naked" qemu_log, bring documentation for DEBUG #defines
up to date.

Reviewed-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent aafcf80e
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+1 −0
Original line number Diff line number Diff line
@@ -23,6 +23,7 @@
#include "helper_regs.h"

//#define DEBUG_OP
//#define DEBUG_SOFTWARE_TLB
//#define DEBUG_EXCEPTIONS

#ifdef DEBUG_EXCEPTIONS
+2 −10
Original line number Diff line number Diff line
@@ -24,17 +24,10 @@
#include "kvm_ppc.h"
#include "mmu-hash32.h"

//#define DEBUG_MMU
//#define DEBUG_BAT

#ifdef DEBUG_MMU
#  define LOG_MMU_STATE(cpu) log_cpu_state((cpu), 0)
#else
#  define LOG_MMU_STATE(cpu) do { } while (0)
#endif

#ifdef DEBUG_BATS
#  define LOG_BATS(...) qemu_log(__VA_ARGS__)
#  define LOG_BATS(...) qemu_log_mask(CPU_LOG_MMU, __VA_ARGS__)
#else
#  define LOG_BATS(...) do { } while (0)
#endif
@@ -281,9 +274,8 @@ static int ppc_hash32_direct_store(CPUPPCState *env, target_ulong sr,
        }
        return 1;
    default:
        qemu_log("ERROR: instruction should not need "
        cpu_abort(cs, "ERROR: instruction should not need "
                 "address translation\n");
        abort();
    }
    if ((rwx == 1 || key != 1) && (rwx == 0 || key != 0)) {
        *raddr = eaddr;
+1 −8
Original line number Diff line number Diff line
@@ -23,17 +23,10 @@
#include "kvm_ppc.h"
#include "mmu-hash64.h"

//#define DEBUG_MMU
//#define DEBUG_SLB

#ifdef DEBUG_MMU
#  define LOG_MMU_STATE(cpu) log_cpu_state((cpu), 0)
#else
#  define LOG_MMU_STATE(cpu) do { } while (0)
#endif

#ifdef DEBUG_SLB
#  define LOG_SLB(...) qemu_log(__VA_ARGS__)
#  define LOG_SLB(...) qemu_log_mask(CPU_LOG_MMU, __VA_ARGS__)
#else
#  define LOG_SLB(...) do { } while (0)
#endif
+7 −8
Original line number Diff line number Diff line
@@ -28,23 +28,22 @@
//#define DEBUG_BATS
//#define DEBUG_SOFTWARE_TLB
//#define DUMP_PAGE_TABLES
//#define DEBUG_SOFTWARE_TLB
//#define FLUSH_ALL_TLBS

#ifdef DEBUG_MMU
#  define LOG_MMU_STATE(cpu) log_cpu_state((cpu), 0)
#  define LOG_MMU_STATE(cpu) log_cpu_state_mask(CPU_LOG_MMU, (cpu), 0)
#else
#  define LOG_MMU_STATE(cpu) do { } while (0)
#endif

#ifdef DEBUG_SOFTWARE_TLB
#  define LOG_SWTLB(...) qemu_log(__VA_ARGS__)
#  define LOG_SWTLB(...) qemu_log_mask(CPU_LOG_MMU, __VA_ARGS__)
#else
#  define LOG_SWTLB(...) do { } while (0)
#endif

#ifdef DEBUG_BATS
#  define LOG_BATS(...) qemu_log(__VA_ARGS__)
#  define LOG_BATS(...) qemu_log_mask(CPU_LOG_MMU, __VA_ARGS__)
#else
#  define LOG_BATS(...) do { } while (0)
#endif
@@ -162,7 +161,7 @@ static inline int ppc6xx_tlb_pte_check(mmu_ctx_t *ctx, target_ulong pte0,
            if (ctx->raddr != (hwaddr)-1ULL) {
                /* all matches should have equal RPN, WIMG & PP */
                if ((ctx->raddr & mmask) != (pte1 & mmask)) {
                    qemu_log("Bad RPN/WIMG/PP\n");
                    qemu_log_mask(CPU_LOG_MMU, "Bad RPN/WIMG/PP\n");
                    return -3;
                }
            }
@@ -508,7 +507,7 @@ static inline int get_segment_6xx_tlb(CPUPPCState *env, mmu_ctx_t *ctx,
            /* Software TLB search */
            ret = ppc6xx_tlb_check(env, ctx, eaddr, rw, type);
#if defined(DUMP_PAGE_TABLES)
            if (qemu_log_enabled()) {
            if (qemu_log_mask(CPU_LOG_MMU)) {
                hwaddr curaddr;
                uint32_t a0, a1, a2, a3;

@@ -575,7 +574,7 @@ static inline int get_segment_6xx_tlb(CPUPPCState *env, mmu_ctx_t *ctx,
            /* eciwx or ecowx */
            return -4;
        default:
            qemu_log("ERROR: instruction should not need "
            qemu_log_mask(CPU_LOG_MMU, "ERROR: instruction should not need "
                          "address translation\n");
            return -4;
        }
+6 −4
Original line number Diff line number Diff line
@@ -130,13 +130,14 @@ target_ulong helper_load_dcr(CPUPPCState *env, target_ulong dcrn)
    uint32_t val = 0;

    if (unlikely(env->dcr_env == NULL)) {
        qemu_log("No DCR environment\n");
        qemu_log_mask(LOG_GUEST_ERROR, "No DCR environment\n");
        helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM,
                                   POWERPC_EXCP_INVAL |
                                   POWERPC_EXCP_INVAL_INVAL);
    } else if (unlikely(ppc_dcr_read(env->dcr_env,
                                     (uint32_t)dcrn, &val) != 0)) {
        qemu_log("DCR read error %d %03x\n", (uint32_t)dcrn, (uint32_t)dcrn);
        qemu_log_mask(LOG_GUEST_ERROR, "DCR read error %d %03x\n",
                      (uint32_t)dcrn, (uint32_t)dcrn);
        helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM,
                                   POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_REG);
    }
@@ -146,13 +147,14 @@ target_ulong helper_load_dcr(CPUPPCState *env, target_ulong dcrn)
void helper_store_dcr(CPUPPCState *env, target_ulong dcrn, target_ulong val)
{
    if (unlikely(env->dcr_env == NULL)) {
        qemu_log("No DCR environment\n");
        qemu_log_mask(LOG_GUEST_ERROR, "No DCR environment\n");
        helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM,
                                   POWERPC_EXCP_INVAL |
                                   POWERPC_EXCP_INVAL_INVAL);
    } else if (unlikely(ppc_dcr_write(env->dcr_env, (uint32_t)dcrn,
                                      (uint32_t)val) != 0)) {
        qemu_log("DCR write error %d %03x\n", (uint32_t)dcrn, (uint32_t)dcrn);
        qemu_log_mask(LOG_GUEST_ERROR, "DCR write error %d %03x\n",
                      (uint32_t)dcrn, (uint32_t)dcrn);
        helper_raise_exception_err(env, POWERPC_EXCP_PROGRAM,
                                   POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_REG);
    }
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