Commit 4879538c authored by Rajalakshmi Srinivasaraghavan's avatar Rajalakshmi Srinivasaraghavan Committed by David Gibson
Browse files

target-ppc: add vclzlsbb/vctzlsbb instructions 



The following vector instructions are added from ISA 3.0.

vclzlsbb - Vector Count Leading Zero Least-Significant Bits Byte
vctzlsbb - Vector Count Trailing Zero Least-Significant Bits Byte

Signed-off-by: default avatarRajalakshmi Srinivasaraghavan <raji@linux.vnet.ibm.com>
Reviewed-by: default avatarRichard Henderson <rth@twiddle.net>
Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
parent 0fa59364

target-ppc/helper.h

+2 −0
Original line number Diff line number Diff line
@@ -343,6 +343,8 @@ DEF_HELPER_2(vpopcntb, void, avr, avr) 
DEF_HELPER_2(vpopcnth, void, avr, avr)

DEF_HELPER_2(vpopcntw, void, avr, avr)

DEF_HELPER_2(vpopcntd, void, avr, avr)

DEF_HELPER_1(vclzlsbb, tl, avr)

DEF_HELPER_1(vctzlsbb, tl, avr)

DEF_HELPER_3(vbpermd, void, avr, avr, avr)

DEF_HELPER_3(vbpermq, void, avr, avr, avr)

DEF_HELPER_2(vgbbd, void, avr, avr)

target-ppc/int_helper.c

+30 −0
Original line number Diff line number Diff line
@@ -881,6 +881,36 @@ VCT(uxs, cvtsduw, u32) 
VCT(sxs, cvtsdsw, s32)

#undef VCT



target_ulong helper_vclzlsbb(ppc_avr_t *r)

{

    target_ulong count = 0;

    int i;

    VECTOR_FOR_INORDER_I(i, u8) {

        if (r->u8[i] & 0x01) {

            break;

        }

        count++;

    }

    return count;

}



target_ulong helper_vctzlsbb(ppc_avr_t *r)

{

    target_ulong count = 0;

    int i;

#if defined(HOST_WORDS_BIGENDIAN)

    for (i = ARRAY_SIZE(r->u8) - 1; i >= 0; i--) {

#else

    for (i = 0; i < ARRAY_SIZE(r->u8); i++) {

#endif

        if (r->u8[i] & 0x01) {

            break;

        }

        count++;

    }

    return count;

}



void helper_vmhaddshs(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a,

                      ppc_avr_t *b, ppc_avr_t *c)

{

target-ppc/translate/vmx-impl.inc.c

+14 −0
Original line number Diff line number Diff line
@@ -593,6 +593,18 @@ static void glue(gen_, name)(DisasContext *ctx) \ 
        tcg_temp_free_ptr(rd);                                          \

    }



#define GEN_VXFORM_NOA_3(name, opc2, opc3, opc4)                        \

static void glue(gen_, name)(DisasContext *ctx)                         \

    {                                                                   \

        TCGv_ptr rb;                                                    \

        if (unlikely(!ctx->altivec_enabled)) {                          \

            gen_exception(ctx, POWERPC_EXCP_VPU);                       \

            return;                                                     \

        }                                                               \

        rb = gen_avr_ptr(rB(ctx->opcode));                              \

        gen_helper_##name(cpu_gpr[rD(ctx->opcode)], rb);                \

        tcg_temp_free_ptr(rb);                                          \

    }

GEN_VXFORM_NOA(vupkhsb, 7, 8);

GEN_VXFORM_NOA(vupkhsh, 7, 9);

GEN_VXFORM_NOA(vupkhsw, 7, 25);
@@ -807,6 +819,8 @@ GEN_VXFORM_NOA_2(vctzb, 1, 24, 28) 
GEN_VXFORM_NOA_2(vctzh, 1, 24, 29)

GEN_VXFORM_NOA_2(vctzw, 1, 24, 30)

GEN_VXFORM_NOA_2(vctzd, 1, 24, 31)

GEN_VXFORM_NOA_3(vclzlsbb, 1, 24, 0)

GEN_VXFORM_NOA_3(vctzlsbb, 1, 24, 1)

GEN_VXFORM_NOA(vpopcntb, 1, 28)

GEN_VXFORM_NOA(vpopcnth, 1, 29)

GEN_VXFORM_NOA(vpopcntw, 1, 30)

target-ppc/translate/vmx-ops.inc.c

+2 −0
Original line number Diff line number Diff line
@@ -219,6 +219,8 @@ GEN_VXFORM_300_EO(vctzb, 0x01, 0x18, 0x1C), 
GEN_VXFORM_300_EO(vctzh, 0x01, 0x18, 0x1D),

GEN_VXFORM_300_EO(vctzw, 0x01, 0x18, 0x1E),

GEN_VXFORM_300_EO(vctzd, 0x01, 0x18, 0x1F),

GEN_VXFORM_300_EO(vclzlsbb, 0x01, 0x18, 0x0),

GEN_VXFORM_300_EO(vctzlsbb, 0x01, 0x18, 0x1),

GEN_VXFORM_300(vpermr, 0x1D, 0xFF),



#define GEN_VXFORM_NOA(name, opc2, opc3)                                \