Loading tcg/aarch64/tcg-target.h +2 −2 Original line number Diff line number Diff line Loading @@ -77,7 +77,7 @@ typedef enum { #define TCG_TARGET_HAS_deposit_i32 1 #define TCG_TARGET_HAS_extract_i32 1 #define TCG_TARGET_HAS_sextract_i32 1 #define TCG_TARGET_HAS_extract2_i32 0 #define TCG_TARGET_HAS_extract2_i32 1 #define TCG_TARGET_HAS_movcond_i32 1 #define TCG_TARGET_HAS_add2_i32 1 #define TCG_TARGET_HAS_sub2_i32 1 Loading Loading @@ -114,7 +114,7 @@ typedef enum { #define TCG_TARGET_HAS_deposit_i64 1 #define TCG_TARGET_HAS_extract_i64 1 #define TCG_TARGET_HAS_sextract_i64 1 #define TCG_TARGET_HAS_extract2_i64 0 #define TCG_TARGET_HAS_extract2_i64 1 #define TCG_TARGET_HAS_movcond_i64 1 #define TCG_TARGET_HAS_add2_i64 1 #define TCG_TARGET_HAS_sub2_i64 1 Loading tcg/aarch64/tcg-target.inc.c +11 −0 Original line number Diff line number Diff line Loading @@ -2058,6 +2058,11 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, tcg_out_sbfm(s, ext, a0, a1, a2, a2 + args[3] - 1); break; case INDEX_op_extract2_i64: case INDEX_op_extract2_i32: tcg_out_extr(s, ext, a0, a1, a2, args[3]); break; case INDEX_op_add2_i32: tcg_out_addsub2(s, TCG_TYPE_I32, a0, a1, REG0(2), REG0(3), (int32_t)args[4], args[5], const_args[4], Loading Loading @@ -2300,6 +2305,8 @@ static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op) = { .args_ct_str = { "r", "r", "rAL" } }; static const TCGTargetOpDef dep = { .args_ct_str = { "r", "0", "rZ" } }; static const TCGTargetOpDef ext2 = { .args_ct_str = { "r", "rZ", "rZ" } }; static const TCGTargetOpDef movc = { .args_ct_str = { "r", "r", "rA", "rZ", "rZ" } }; static const TCGTargetOpDef add2 Loading Loading @@ -2430,6 +2437,10 @@ static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op) case INDEX_op_deposit_i64: return &dep; case INDEX_op_extract2_i32: case INDEX_op_extract2_i64: return &ext2; case INDEX_op_add2_i32: case INDEX_op_add2_i64: case INDEX_op_sub2_i32: Loading Loading
tcg/aarch64/tcg-target.h +2 −2 Original line number Diff line number Diff line Loading @@ -77,7 +77,7 @@ typedef enum { #define TCG_TARGET_HAS_deposit_i32 1 #define TCG_TARGET_HAS_extract_i32 1 #define TCG_TARGET_HAS_sextract_i32 1 #define TCG_TARGET_HAS_extract2_i32 0 #define TCG_TARGET_HAS_extract2_i32 1 #define TCG_TARGET_HAS_movcond_i32 1 #define TCG_TARGET_HAS_add2_i32 1 #define TCG_TARGET_HAS_sub2_i32 1 Loading Loading @@ -114,7 +114,7 @@ typedef enum { #define TCG_TARGET_HAS_deposit_i64 1 #define TCG_TARGET_HAS_extract_i64 1 #define TCG_TARGET_HAS_sextract_i64 1 #define TCG_TARGET_HAS_extract2_i64 0 #define TCG_TARGET_HAS_extract2_i64 1 #define TCG_TARGET_HAS_movcond_i64 1 #define TCG_TARGET_HAS_add2_i64 1 #define TCG_TARGET_HAS_sub2_i64 1 Loading
tcg/aarch64/tcg-target.inc.c +11 −0 Original line number Diff line number Diff line Loading @@ -2058,6 +2058,11 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, tcg_out_sbfm(s, ext, a0, a1, a2, a2 + args[3] - 1); break; case INDEX_op_extract2_i64: case INDEX_op_extract2_i32: tcg_out_extr(s, ext, a0, a1, a2, args[3]); break; case INDEX_op_add2_i32: tcg_out_addsub2(s, TCG_TYPE_I32, a0, a1, REG0(2), REG0(3), (int32_t)args[4], args[5], const_args[4], Loading Loading @@ -2300,6 +2305,8 @@ static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op) = { .args_ct_str = { "r", "r", "rAL" } }; static const TCGTargetOpDef dep = { .args_ct_str = { "r", "0", "rZ" } }; static const TCGTargetOpDef ext2 = { .args_ct_str = { "r", "rZ", "rZ" } }; static const TCGTargetOpDef movc = { .args_ct_str = { "r", "r", "rA", "rZ", "rZ" } }; static const TCGTargetOpDef add2 Loading Loading @@ -2430,6 +2437,10 @@ static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op) case INDEX_op_deposit_i64: return &dep; case INDEX_op_extract2_i32: case INDEX_op_extract2_i64: return &ext2; case INDEX_op_add2_i32: case INDEX_op_add2_i64: case INDEX_op_sub2_i32: Loading