Commit 43fa36c9 authored by Richard Henderson's avatar Richard Henderson Committed by Peter Maydell
Browse files

target/arm: Split helper_crypto_sm3tt 



Rather than passing an opcode to a helper, fully decode the
operation at translate time.  Use clear_tail_16 to zap the
balance of the SVE register with the AdvSIMD write.

Signed-off-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Message-id: 20200514212831.31248-7-richard.henderson@linaro.org
Reviewed-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent afc8b7d3

target/arm/crypto_helper.c

+18 −6
Original line number Diff line number Diff line
@@ -632,15 +632,14 @@ void HELPER(crypto_sm3partw2)(void *vd, void *vn, void *vm, uint32_t desc) 
    clear_tail_16(vd, desc);

}



void HELPER(crypto_sm3tt)(void *vd, void *vn, void *vm, uint32_t imm2,

                          uint32_t opcode)

static inline void QEMU_ALWAYS_INLINE

crypto_sm3tt(uint64_t *rd, uint64_t *rn, uint64_t *rm,

             uint32_t desc, uint32_t opcode)

{

    uint64_t *rd = vd;

    uint64_t *rn = vn;

    uint64_t *rm = vm;

    union CRYPTO_STATE d = { .l = { rd[0], rd[1] } };

    union CRYPTO_STATE n = { .l = { rn[0], rn[1] } };

    union CRYPTO_STATE m = { .l = { rm[0], rm[1] } };

    uint32_t imm2 = simd_data(desc);

    uint32_t t;



    assert(imm2 < 4);
@@ -655,7 +654,7 @@ void HELPER(crypto_sm3tt)(void *vd, void *vn, void *vm, uint32_t imm2, 
        /* SM3TT2B */

        t = cho(CR_ST_WORD(d, 3), CR_ST_WORD(d, 2), CR_ST_WORD(d, 1));

    } else {

        g_assert_not_reached();

        qemu_build_not_reached();

    }



    t += CR_ST_WORD(d, 0) + CR_ST_WORD(m, imm2);
@@ -680,8 +679,21 @@ void HELPER(crypto_sm3tt)(void *vd, void *vn, void *vm, uint32_t imm2, 


    rd[0] = d.l[0];

    rd[1] = d.l[1];



    clear_tail_16(rd, desc);

}



#define DO_SM3TT(NAME, OPCODE) \

    void HELPER(NAME)(void *vd, void *vn, void *vm, uint32_t desc) \

    { crypto_sm3tt(vd, vn, vm, desc, OPCODE); }



DO_SM3TT(crypto_sm3tt1a, 0)

DO_SM3TT(crypto_sm3tt1b, 1)

DO_SM3TT(crypto_sm3tt2a, 2)

DO_SM3TT(crypto_sm3tt2b, 3)



#undef DO_SM3TT



static uint8_t const sm4_sbox[] = {

    0xd6, 0x90, 0xe9, 0xfe, 0xcc, 0xe1, 0x3d, 0xb7,

    0x16, 0xb6, 0x14, 0xc2, 0x28, 0xfb, 0x2c, 0x05,

target/arm/helper.h

+4 −1
Original line number Diff line number Diff line
@@ -531,7 +531,10 @@ DEF_HELPER_FLAGS_3(crypto_sha512su0, TCG_CALL_NO_RWG, void, ptr, ptr, i32) 
DEF_HELPER_FLAGS_4(crypto_sha512su1, TCG_CALL_NO_RWG,

                   void, ptr, ptr, ptr, i32)



DEF_HELPER_FLAGS_5(crypto_sm3tt, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32, i32)

DEF_HELPER_FLAGS_4(crypto_sm3tt1a, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)

DEF_HELPER_FLAGS_4(crypto_sm3tt1b, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)

DEF_HELPER_FLAGS_4(crypto_sm3tt2a, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)

DEF_HELPER_FLAGS_4(crypto_sm3tt2b, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)

DEF_HELPER_FLAGS_4(crypto_sm3partw1, TCG_CALL_NO_RWG,

                   void, ptr, ptr, ptr, i32)

DEF_HELPER_FLAGS_4(crypto_sm3partw2, TCG_CALL_NO_RWG,

target/arm/translate-a64.c

+5 −16
Original line number Diff line number Diff line
@@ -13866,13 +13866,15 @@ static void disas_crypto_xar(DisasContext *s, uint32_t insn) 
 */

static void disas_crypto_three_reg_imm2(DisasContext *s, uint32_t insn)

{

    static gen_helper_gvec_3 * const fns[4] = {

        gen_helper_crypto_sm3tt1a, gen_helper_crypto_sm3tt1b,

        gen_helper_crypto_sm3tt2a, gen_helper_crypto_sm3tt2b,

    };

    int opcode = extract32(insn, 10, 2);

    int imm2 = extract32(insn, 12, 2);

    int rm = extract32(insn, 16, 5);

    int rn = extract32(insn, 5, 5);

    int rd = extract32(insn, 0, 5);

    TCGv_ptr tcg_rd_ptr, tcg_rn_ptr, tcg_rm_ptr;

    TCGv_i32 tcg_imm2, tcg_opcode;



    if (!dc_isar_feature(aa64_sm3, s)) {

        unallocated_encoding(s);
@@ -13883,20 +13885,7 @@ static void disas_crypto_three_reg_imm2(DisasContext *s, uint32_t insn) 
        return;

    }



    tcg_rd_ptr = vec_full_reg_ptr(s, rd);

    tcg_rn_ptr = vec_full_reg_ptr(s, rn);

    tcg_rm_ptr = vec_full_reg_ptr(s, rm);

    tcg_imm2   = tcg_const_i32(imm2);

    tcg_opcode = tcg_const_i32(opcode);



    gen_helper_crypto_sm3tt(tcg_rd_ptr, tcg_rn_ptr, tcg_rm_ptr, tcg_imm2,

                            tcg_opcode);



    tcg_temp_free_ptr(tcg_rd_ptr);

    tcg_temp_free_ptr(tcg_rn_ptr);

    tcg_temp_free_ptr(tcg_rm_ptr);

    tcg_temp_free_i32(tcg_imm2);

    tcg_temp_free_i32(tcg_opcode);

    gen_gvec_op3_ool(s, true, rd, rn, rm, imm2, fns[opcode]);

}



/* C3.6 Data processing - SIMD, inc Crypto