Commit 43675d20 authored Mar 11, 2019 by Sven Schnelle Committed by Richard Henderson Mar 12, 2019

target/hppa: fix overwriting source reg in addb

When one of the source registers is the same as the destination register,
the source register gets overwritten with the destionation value before
do_add_sv() is called, which leads to unexpection condition matches.

Signed-off-by: Sven Schnelle <svens@stackframe.org>
Message-Id: <20190311191602.25796-2-svens@stackframe.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

parent f3b423ec

target/hppa/translate.c

+3 −1

Original line number	Diff line number	Diff line
		@@ -3031,7 +3031,7 @@ static bool do_addb(DisasContext *ctx, unsigned r, TCGv_reg in1,
		DisasCond cond;

		in2 = load_gpr(ctx, r);
		dest = dest_gpr(ctx, r);
		dest = tcg_temp_new();
		sv = NULL;
		cb_msb = NULL;

		@@ -3047,6 +3047,8 @@ static bool do_addb(DisasContext *ctx, unsigned r, TCGv_reg in1,
		}

		cond = do_cond(c * 2 + f, dest, cb_msb, sv);
		save_gpr(ctx, r, dest);
		tcg_temp_free(dest);
		return do_cbranch(ctx, disp, n, &cond);
		}